Contiki 2.6

gpio.h

00001 /*
00002  * Copyright (c) 2010, Mariano Alvira <mar@devl.org> and other contributors
00003  * to the MC1322x project (http://mc1322x.devl.org)
00004  * All rights reserved.
00005  *
00006  * Redistribution and use in source and binary forms, with or without
00007  * modification, are permitted provided that the following conditions
00008  * are met:
00009  * 1. Redistributions of source code must retain the above copyright
00010  *    notice, this list of conditions and the following disclaimer.
00011  * 2. Redistributions in binary form must reproduce the above copyright
00012  *    notice, this list of conditions and the following disclaimer in the
00013  *    documentation and/or other materials provided with the distribution.
00014  * 3. Neither the name of the Institute nor the names of its contributors
00015  *    may be used to endorse or promote products derived from this software
00016  *    without specific prior written permission.
00017  *
00018  * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
00019  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
00020  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
00021  * ARE DISCLAIMED.  IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
00022  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
00023  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
00024  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
00025  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
00026  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
00027  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
00028  * SUCH DAMAGE.
00029  *
00030  * This file is part of libmc1322x: see http://mc1322x.devl.org
00031  * for details. 
00032  *
00033  *
00034  */
00035 
00036 #ifndef GPIO_H
00037 #define GPIO_H
00038 
00039 /* Structure-based GPIO access
00040    Example usage:
00041 
00042    GPIO->FUNC_SEL0 |= 0x00008000; // set a whole register
00043 
00044    GPIO->FUNC_SEL_08 = 2;        // set just one pin
00045 
00046    #define MY_PIN GPIO_08
00047    GPIO->FUNC_SEL.MY_PIN = 2;    // same, to allow #define for pin names
00048    GPIO->DATA.MY_PIN = 1;
00049 
00050    gpio_set(GPIO_08);            // efficiently set or clear a single output bit
00051    gpio_reset(GPIO_08);
00052 */
00053 
00054 #define _V(x,n,i) uint32_t x##_##i : n;
00055 #define _REP(x,n) \
00056         _V(x,n,00) _V(x,n,01) _V(x,n,02) _V(x,n,03) _V(x,n,04) _V(x,n,05) _V(x,n,06) _V(x,n,07) \
00057         _V(x,n,08) _V(x,n,09) _V(x,n,10) _V(x,n,11) _V(x,n,12) _V(x,n,13) _V(x,n,14) _V(x,n,15) \
00058         _V(x,n,16) _V(x,n,17) _V(x,n,18) _V(x,n,19) _V(x,n,20) _V(x,n,21) _V(x,n,22) _V(x,n,23) \
00059         _V(x,n,24) _V(x,n,25) _V(x,n,26) _V(x,n,27) _V(x,n,28) _V(x,n,29) _V(x,n,30) _V(x,n,31) \
00060         _V(x,n,32) _V(x,n,33) _V(x,n,34) _V(x,n,35) _V(x,n,36) _V(x,n,37) _V(x,n,38) _V(x,n,39) \
00061         _V(x,n,40) _V(x,n,41) _V(x,n,42) _V(x,n,43) _V(x,n,44) _V(x,n,45) _V(x,n,46) _V(x,n,47) \
00062         _V(x,n,48) _V(x,n,49) _V(x,n,50) _V(x,n,51) _V(x,n,52) _V(x,n,53) _V(x,n,54) _V(x,n,55) \
00063         _V(x,n,56) _V(x,n,57) _V(x,n,58) _V(x,n,59) _V(x,n,60) _V(x,n,61) _V(x,n,62) _V(x,n,63)
00064 
00065 struct GPIO_struct {
00066 #define _IO(x) \
00067         union { struct { uint32_t x##0; uint32_t x##1; }; \
00068                 struct { _REP(x, 1) };  \
00069                 struct GPIO_##x { _REP(GPIO, 1) } x; };
00070 #define _IO_2bit(x)     \
00071         union { struct { uint32_t x##0; uint32_t x##1; uint32_t x##2; uint32_t x##3; }; \
00072                 struct { _REP(x, 2) };  \
00073                 struct GPIO_##x { _REP(GPIO, 2) } x; };
00074 
00075         _IO(PAD_DIR);
00076         _IO(DATA);
00077         _IO(PAD_PU_EN);
00078         _IO_2bit(FUNC_SEL);
00079         _IO(DATA_SEL);
00080         _IO(PAD_PU_SEL);
00081         _IO(PAD_HYST_EN);
00082         _IO(PAD_KEEP);
00083         _IO(DATA_SET);
00084         _IO(DATA_RESET);
00085         _IO(PAD_DIR_SET);
00086         _IO(PAD_DIR_RESET);
00087 };
00088 #undef _IO
00089 #undef _IO_2bit
00090 
00091 /* Build an enum lookup to map GPIO_08 -> 8 */
00092 #undef _V
00093 #define _V(x,n,i) __NUM_GPIO_GPIO_##i,
00094 enum { _REP(0,0) };
00095 
00096 /* Macros to set or reset a data pin in the fastest possible way */
00097 #define gpio_set(gpio_xx) __gpio_set(gpio_xx)
00098 #define __gpio_set(gpio_xx)                                             \
00099         ((__NUM_GPIO_##gpio_xx < 32)                                    \
00100          ? (GPIO->DATA_SET0 = (1 << (__NUM_GPIO_##gpio_xx - 0)))        \
00101          : (GPIO->DATA_SET1 = (1 << (__NUM_GPIO_##gpio_xx - 32))))
00102 #define gpio_reset(gpio_xx) __gpio_reset(gpio_xx)
00103 #define __gpio_reset(gpio_xx)                                           \
00104         ((__NUM_GPIO_##gpio_xx < 32)                                    \
00105          ? (GPIO->DATA_RESET0 = (1 << (__NUM_GPIO_##gpio_xx - 0)))      \
00106          : (GPIO->DATA_RESET1 = (1 << (__NUM_GPIO_##gpio_xx - 32))))
00107 
00108 #undef _REP
00109 #undef _V
00110 
00111 static volatile struct GPIO_struct * const GPIO = (void *) (0x80000000);
00112 
00113 
00114 /* Old register definitions, for compatibility */
00115 #ifndef REG_NO_COMPAT
00116 
00117 #define GPIO_PAD_DIR0      ((volatile uint32_t *) 0x80000000)
00118 #define GPIO_PAD_DIR1      ((volatile uint32_t *) 0x80000004)
00119 #define GPIO_DATA0         ((volatile uint32_t *) 0x80000008)
00120 #define GPIO_DATA1         ((volatile uint32_t *) 0x8000000c)
00121 #define GPIO_PAD_PU_EN0    ((volatile uint32_t *) 0x80000010)
00122 #define GPIO_PAD_PU_EN1    ((volatile uint32_t *) 0x80000014)
00123 #define GPIO_FUNC_SEL0     ((volatile uint32_t *) 0x80000018) /* GPIO 15 -  0;  2 bit blocks */
00124 #define GPIO_FUNC_SEL1     ((volatile uint32_t *) 0x8000001c) /* GPIO 16 - 31;  2 bit blocks */
00125 #define GPIO_FUNC_SEL2     ((volatile uint32_t *) 0x80000020) /* GPIO 32 - 47;  2 bit blocks */
00126 #define GPIO_FUNC_SEL3     ((volatile uint32_t *) 0x80000024) /* GPIO 48 - 63;  2 bit blocks */
00127 #define GPIO_DATA_SEL0     ((volatile uint32_t *) 0x80000028) 
00128 #define GPIO_DATA_SEL1     ((volatile uint32_t *) 0x8000002c) 
00129 #define GPIO_PAD_PU_SEL0   ((volatile uint32_t *) 0x80000030)
00130 #define GPIO_PAD_PU_SEL1   ((volatile uint32_t *) 0x80000034)
00131 
00132 #define GPIO_DATA_SET0      ((volatile uint32_t *) 0x80000048)
00133 #define GPIO_DATA_SET1      ((volatile uint32_t *) 0x8000004c)
00134 #define GPIO_DATA_RESET0    ((volatile uint32_t *) 0x80000050)
00135 #define GPIO_DATA_RESET1    ((volatile uint32_t *) 0x80000054)
00136 #define GPIO_PAD_DIR_SET0   ((volatile uint32_t *) 0x80000058)
00137 #define GPIO_PAD_DIR_SET1   ((volatile uint32_t *) 0x8000005c)
00138 #define GPIO_PAD_DIR_RESET0 ((volatile uint32_t *) 0x80000060)
00139 #define GPIO_PAD_DIR_RESET1 ((volatile uint32_t *) 0x80000064)
00140 
00141 inline void gpio_pad_dir(volatile uint64_t data);
00142 inline void gpio_data(volatile uint64_t data); 
00143 inline uint64_t gpio_data_get(volatile uint64_t bits);
00144 inline void gpio_pad_pu_en(volatile uint64_t data); 
00145 inline void gpio_data_sel(volatile uint64_t data); 
00146 inline void gpio_data_pu_sel(volatile uint64_t data); 
00147 inline void gpio_data_set(volatile uint64_t data); 
00148 inline void gpio_data_reset(volatile uint64_t data); 
00149 inline void gpio_pad_dir_set(volatile uint64_t data); 
00150 inline void gpio_pad_dir_reset(volatile uint64_t data); 
00151 
00152 /* select pullup or pulldown for GPIO 0-31 (b=0-31) */
00153 #define gpio_sel0_pullup(b) (set_bit(*GPIO_PAD_PU_SEL0,b))
00154 #define gpio_sel0_pulldown(b) (clear_bit(*GPIO_PAD_PU_SEL0,b))
00155 
00156 /* select pullup or pulldown for GPIO 32-63 (b=32-63) */
00157 #define gpio_sel1_pullup(b) (set_bit(*GPIO_PAD_PU_SEL1,b-32))
00158 #define gpio_sel1_pulldown(b) (clear_bit(*GPIO_PAD_PU_SEL1,b-32))
00159 
00160 /* enable/disable pullup for GPIO 0-31 (b=0-31) */
00161 #define gpio_pu0_enable(b) (set_bit(*GPIO_PAD_PU_EN0,b))
00162 #define gpio_pu0_disable(b) (clear_bit(*GPIO_PAD_PU_EN0,b))
00163 
00164 /* enable/disable pullup for GPIO 32-63 (b=32-63) */
00165 #define gpio_pu1_enable(b) (set_bit(*GPIO_PAD_PU_EN1,b-32))
00166 #define gpio_pu1_disable(b) (clear_bit(*GPIO_PAD_PU_EN1,b-32))
00167 
00168 #endif /* REG_NO_COMPAT */
00169 
00170 #endif