docs/2.6/a00587_source.html

00001 #ifndef __NVIC_H__LE94F5JS4D__
00002 #define __NVIC_H__LE94F5JS4D__
00003 #include <stm32f10x_map.h>
00004 #include <stm32f10x_nvic.h>
00005
00006 #define NVIC_ENABLE_INT(i) WRITE_REG(NVIC->ISER[(i)/32], 1<<((i) & 0x1f))
00007 #define NVIC_DISABLE_INT(i) WRITE_REG(NVIC->ICER[(i)/32], 1<<((i) & 0x1f))
00008 #define NVIC_SET_PENDING(i) WRITE_REG(NVIC->ISPR[(i)/32], 1<<((i) & 0x1f))
00009 #define NVIC_CLEAR_PENDING(i) WRITE_REG(NVIC->ICPR[(i)/32], 1<<((i) & 0x1f))
00010
00011 #define NVIC_SET_PRIORITY(i,p) \
00012 MODIFY_REG(NVIC->IPR[(i)/4], 0xf<<(((i)&3)*8), (p)<<(((i)&3)*8))
00013
00014 #define NVIC_SET_SYSTICK_PRI(p) MODIFY_REG(SCB->SHPR[2],  0xf<<24, (p)<<24)
00015
00016 #endif /* __NVIC_H__LE94F5JS4D__ */