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00001 /* 00002 * Copyright (c) 2010, Mariano Alvira <mar@devl.org> and other contributors 00003 * to the MC1322x project (http://mc1322x.devl.org) 00004 * All rights reserved. 00005 * 00006 * Redistribution and use in source and binary forms, with or without 00007 * modification, are permitted provided that the following conditions 00008 * are met: 00009 * 1. Redistributions of source code must retain the above copyright 00010 * notice, this list of conditions and the following disclaimer. 00011 * 2. Redistributions in binary form must reproduce the above copyright 00012 * notice, this list of conditions and the following disclaimer in the 00013 * documentation and/or other materials provided with the distribution. 00014 * 3. Neither the name of the Institute nor the names of its contributors 00015 * may be used to endorse or promote products derived from this software 00016 * without specific prior written permission. 00017 * 00018 * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND 00019 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 00020 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 00021 * ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE 00022 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 00023 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 00024 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 00025 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 00026 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 00027 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 00028 * SUCH DAMAGE. 00029 * 00030 * This file is part of libmc1322x: see http://mc1322x.devl.org 00031 * for details. 00032 * 00033 * 00034 */ 00035 00036 #ifndef CONFIG_H 00037 #define CONFIG_H 00038 00039 /* Baud rate */ 00040 #define MOD 9999 00041 /* 230400 bps, INC=767, MOD=9999, 24Mhz 16x samp */ 00042 /* 115200 bps, INC=767, MOD=9999, 24Mhz 8x samp */ 00043 #define INC 767 00044 /* 921600 bps, MOD=9999, 24Mhz 16x samp */ 00045 //#define INC 3071 00046 #define SAMP UCON_SAMP_8X 00047 //#define SAMP UCON_SAMP_16X 00048 00049 /* use uart1 for console */ 00050 #define uart_init uart1_init 00051 00052 /* nvm-read */ 00053 #define READ_ADDR 0x1f000 00054 #define READ_NBYTES 1024 00055 00056 /* nvm-write */ 00057 #define WRITE_NBYTES 8 00058 #define WRITE_ADDR 0x1e000 00059 #define WRITEVAL0 0xdeadbeef 00060 #define WRITEVAL1 0xdeadbeef 00061 00062 /* romimg */ 00063 #define DUMP_BASE 0x00000000 00064 #define DUMP_LEN 0x00014000 00065 00066 /* flasher */ 00067 /* if both BOOT_OK and BOOT_SECURE are 0 then flash image will not be bootable */ 00068 /* if both are 1 then flash image will be secure */ 00069 #define BOOT_OK 1 00070 #define BOOT_SECURE 0 00071 00072 /* sleep */ 00073 #undef USE_32KHZ /* board should have a HAS_32KHZ define */ 00074 00075 #endif