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00001 /******************** (C) COPYRIGHT 2008 STMicroelectronics ******************** 00002 * File Name : stm32f10x_nvic.h 00003 * Author : MCD Application Team 00004 * Version : V2.0.3 00005 * Date : 09/22/2008 00006 * Description : This file contains all the functions prototypes for the 00007 * NVIC firmware library. 00008 ******************************************************************************** 00009 * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS 00010 * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. 00011 * AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, 00012 * INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE 00013 * CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING 00014 * INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. 00015 *******************************************************************************/ 00016 00017 /* Define to prevent recursive inclusion -------------------------------------*/ 00018 #ifndef __STM32F10x_NVIC_H 00019 #define __STM32F10x_NVIC_H 00020 00021 /* Includes ------------------------------------------------------------------*/ 00022 #include "stm32f10x_map.h" 00023 00024 /* Exported types ------------------------------------------------------------*/ 00025 /* NVIC Init Structure definition */ 00026 typedef struct 00027 { 00028 u8 NVIC_IRQChannel; 00029 u8 NVIC_IRQChannelPreemptionPriority; 00030 u8 NVIC_IRQChannelSubPriority; 00031 FunctionalState NVIC_IRQChannelCmd; 00032 } NVIC_InitTypeDef; 00033 00034 /* Exported constants --------------------------------------------------------*/ 00035 /* IRQ Channels --------------------------------------------------------------*/ 00036 #define WWDG_IRQChannel ((u8)0x00) /* Window WatchDog Interrupt */ 00037 #define PVD_IRQChannel ((u8)0x01) /* PVD through EXTI Line detection Interrupt */ 00038 #define TAMPER_IRQChannel ((u8)0x02) /* Tamper Interrupt */ 00039 #define RTC_IRQChannel ((u8)0x03) /* RTC global Interrupt */ 00040 #define FLASH_IRQChannel ((u8)0x04) /* FLASH global Interrupt */ 00041 #define RCC_IRQChannel ((u8)0x05) /* RCC global Interrupt */ 00042 #define EXTI0_IRQChannel ((u8)0x06) /* EXTI Line0 Interrupt */ 00043 #define EXTI1_IRQChannel ((u8)0x07) /* EXTI Line1 Interrupt */ 00044 #define EXTI2_IRQChannel ((u8)0x08) /* EXTI Line2 Interrupt */ 00045 #define EXTI3_IRQChannel ((u8)0x09) /* EXTI Line3 Interrupt */ 00046 #define EXTI4_IRQChannel ((u8)0x0A) /* EXTI Line4 Interrupt */ 00047 #define DMA1_Channel1_IRQChannel ((u8)0x0B) /* DMA1 Channel 1 global Interrupt */ 00048 #define DMA1_Channel2_IRQChannel ((u8)0x0C) /* DMA1 Channel 2 global Interrupt */ 00049 #define DMA1_Channel3_IRQChannel ((u8)0x0D) /* DMA1 Channel 3 global Interrupt */ 00050 #define DMA1_Channel4_IRQChannel ((u8)0x0E) /* DMA1 Channel 4 global Interrupt */ 00051 #define DMA1_Channel5_IRQChannel ((u8)0x0F) /* DMA1 Channel 5 global Interrupt */ 00052 #define DMA1_Channel6_IRQChannel ((u8)0x10) /* DMA1 Channel 6 global Interrupt */ 00053 #define DMA1_Channel7_IRQChannel ((u8)0x11) /* DMA1 Channel 7 global Interrupt */ 00054 #define ADC1_2_IRQChannel ((u8)0x12) /* ADC1 et ADC2 global Interrupt */ 00055 #define USB_HP_CAN_TX_IRQChannel ((u8)0x13) /* USB High Priority or CAN TX Interrupts */ 00056 #define USB_LP_CAN_RX0_IRQChannel ((u8)0x14) /* USB Low Priority or CAN RX0 Interrupts */ 00057 #define CAN_RX1_IRQChannel ((u8)0x15) /* CAN RX1 Interrupt */ 00058 #define CAN_SCE_IRQChannel ((u8)0x16) /* CAN SCE Interrupt */ 00059 #define EXTI9_5_IRQChannel ((u8)0x17) /* External Line[9:5] Interrupts */ 00060 #define TIM1_BRK_IRQChannel ((u8)0x18) /* TIM1 Break Interrupt */ 00061 #define TIM1_UP_IRQChannel ((u8)0x19) /* TIM1 Update Interrupt */ 00062 #define TIM1_TRG_COM_IRQChannel ((u8)0x1A) /* TIM1 Trigger and Commutation Interrupt */ 00063 #define TIM1_CC_IRQChannel ((u8)0x1B) /* TIM1 Capture Compare Interrupt */ 00064 #define TIM2_IRQChannel ((u8)0x1C) /* TIM2 global Interrupt */ 00065 #define TIM3_IRQChannel ((u8)0x1D) /* TIM3 global Interrupt */ 00066 #define TIM4_IRQChannel ((u8)0x1E) /* TIM4 global Interrupt */ 00067 #define I2C1_EV_IRQChannel ((u8)0x1F) /* I2C1 Event Interrupt */ 00068 #define I2C1_ER_IRQChannel ((u8)0x20) /* I2C1 Error Interrupt */ 00069 #define I2C2_EV_IRQChannel ((u8)0x21) /* I2C2 Event Interrupt */ 00070 #define I2C2_ER_IRQChannel ((u8)0x22) /* I2C2 Error Interrupt */ 00071 #define SPI1_IRQChannel ((u8)0x23) /* SPI1 global Interrupt */ 00072 #define SPI2_IRQChannel ((u8)0x24) /* SPI2 global Interrupt */ 00073 #define USART1_IRQChannel ((u8)0x25) /* USART1 global Interrupt */ 00074 #define USART2_IRQChannel ((u8)0x26) /* USART2 global Interrupt */ 00075 #define USART3_IRQChannel ((u8)0x27) /* USART3 global Interrupt */ 00076 #define EXTI15_10_IRQChannel ((u8)0x28) /* External Line[15:10] Interrupts */ 00077 #define RTCAlarm_IRQChannel ((u8)0x29) /* RTC Alarm through EXTI Line Interrupt */ 00078 #define USBWakeUp_IRQChannel ((u8)0x2A) /* USB WakeUp from suspend through EXTI Line Interrupt */ 00079 #define TIM8_BRK_IRQChannel ((u8)0x2B) /* TIM8 Break Interrupt */ 00080 #define TIM8_UP_IRQChannel ((u8)0x2C) /* TIM8 Update Interrupt */ 00081 #define TIM8_TRG_COM_IRQChannel ((u8)0x2D) /* TIM8 Trigger and Commutation Interrupt */ 00082 #define TIM8_CC_IRQChannel ((u8)0x2E) /* TIM8 Capture Compare Interrupt */ 00083 #define ADC3_IRQChannel ((u8)0x2F) /* ADC3 global Interrupt */ 00084 #define FSMC_IRQChannel ((u8)0x30) /* FSMC global Interrupt */ 00085 #define SDIO_IRQChannel ((u8)0x31) /* SDIO global Interrupt */ 00086 #define TIM5_IRQChannel ((u8)0x32) /* TIM5 global Interrupt */ 00087 #define SPI3_IRQChannel ((u8)0x33) /* SPI3 global Interrupt */ 00088 #define UART4_IRQChannel ((u8)0x34) /* UART4 global Interrupt */ 00089 #define UART5_IRQChannel ((u8)0x35) /* UART5 global Interrupt */ 00090 #define TIM6_IRQChannel ((u8)0x36) /* TIM6 global Interrupt */ 00091 #define TIM7_IRQChannel ((u8)0x37) /* TIM7 global Interrupt */ 00092 #define DMA2_Channel1_IRQChannel ((u8)0x38) /* DMA2 Channel 1 global Interrupt */ 00093 #define DMA2_Channel2_IRQChannel ((u8)0x39) /* DMA2 Channel 2 global Interrupt */ 00094 #define DMA2_Channel3_IRQChannel ((u8)0x3A) /* DMA2 Channel 3 global Interrupt */ 00095 #define DMA2_Channel4_5_IRQChannel ((u8)0x3B) /* DMA2 Channel 4 and DMA2 Channel 5 global Interrupt */ 00096 00097 00098 #define IS_NVIC_IRQ_CHANNEL(CHANNEL) (((CHANNEL) == WWDG_IRQChannel) || \ 00099 ((CHANNEL) == PVD_IRQChannel) || \ 00100 ((CHANNEL) == TAMPER_IRQChannel) || \ 00101 ((CHANNEL) == RTC_IRQChannel) || \ 00102 ((CHANNEL) == FLASH_IRQChannel) || \ 00103 ((CHANNEL) == RCC_IRQChannel) || \ 00104 ((CHANNEL) == EXTI0_IRQChannel) || \ 00105 ((CHANNEL) == EXTI1_IRQChannel) || \ 00106 ((CHANNEL) == EXTI2_IRQChannel) || \ 00107 ((CHANNEL) == EXTI3_IRQChannel) || \ 00108 ((CHANNEL) == EXTI4_IRQChannel) || \ 00109 ((CHANNEL) == DMA1_Channel1_IRQChannel) || \ 00110 ((CHANNEL) == DMA1_Channel2_IRQChannel) || \ 00111 ((CHANNEL) == DMA1_Channel3_IRQChannel) || \ 00112 ((CHANNEL) == DMA1_Channel4_IRQChannel) || \ 00113 ((CHANNEL) == DMA1_Channel5_IRQChannel) || \ 00114 ((CHANNEL) == DMA1_Channel6_IRQChannel) || \ 00115 ((CHANNEL) == DMA1_Channel7_IRQChannel) || \ 00116 ((CHANNEL) == ADC1_2_IRQChannel) || \ 00117 ((CHANNEL) == USB_HP_CAN_TX_IRQChannel) || \ 00118 ((CHANNEL) == USB_LP_CAN_RX0_IRQChannel) || \ 00119 ((CHANNEL) == CAN_RX1_IRQChannel) || \ 00120 ((CHANNEL) == CAN_SCE_IRQChannel) || \ 00121 ((CHANNEL) == EXTI9_5_IRQChannel) || \ 00122 ((CHANNEL) == TIM1_BRK_IRQChannel) || \ 00123 ((CHANNEL) == TIM1_UP_IRQChannel) || \ 00124 ((CHANNEL) == TIM1_TRG_COM_IRQChannel) || \ 00125 ((CHANNEL) == TIM1_CC_IRQChannel) || \ 00126 ((CHANNEL) == TIM2_IRQChannel) || \ 00127 ((CHANNEL) == TIM3_IRQChannel) || \ 00128 ((CHANNEL) == TIM4_IRQChannel) || \ 00129 ((CHANNEL) == I2C1_EV_IRQChannel) || \ 00130 ((CHANNEL) == I2C1_ER_IRQChannel) || \ 00131 ((CHANNEL) == I2C2_EV_IRQChannel) || \ 00132 ((CHANNEL) == I2C2_ER_IRQChannel) || \ 00133 ((CHANNEL) == SPI1_IRQChannel) || \ 00134 ((CHANNEL) == SPI2_IRQChannel) || \ 00135 ((CHANNEL) == USART1_IRQChannel) || \ 00136 ((CHANNEL) == USART2_IRQChannel) || \ 00137 ((CHANNEL) == USART3_IRQChannel) || \ 00138 ((CHANNEL) == EXTI15_10_IRQChannel) || \ 00139 ((CHANNEL) == RTCAlarm_IRQChannel) || \ 00140 ((CHANNEL) == USBWakeUp_IRQChannel) || \ 00141 ((CHANNEL) == TIM8_BRK_IRQChannel) || \ 00142 ((CHANNEL) == TIM8_UP_IRQChannel) || \ 00143 ((CHANNEL) == TIM8_TRG_COM_IRQChannel) || \ 00144 ((CHANNEL) == TIM8_CC_IRQChannel) || \ 00145 ((CHANNEL) == ADC3_IRQChannel) || \ 00146 ((CHANNEL) == FSMC_IRQChannel) || \ 00147 ((CHANNEL) == SDIO_IRQChannel) || \ 00148 ((CHANNEL) == TIM5_IRQChannel) || \ 00149 ((CHANNEL) == SPI3_IRQChannel) || \ 00150 ((CHANNEL) == UART4_IRQChannel) || \ 00151 ((CHANNEL) == UART5_IRQChannel) || \ 00152 ((CHANNEL) == TIM6_IRQChannel) || \ 00153 ((CHANNEL) == TIM7_IRQChannel) || \ 00154 ((CHANNEL) == DMA2_Channel1_IRQChannel) || \ 00155 ((CHANNEL) == DMA2_Channel2_IRQChannel) || \ 00156 ((CHANNEL) == DMA2_Channel3_IRQChannel) || \ 00157 ((CHANNEL) == DMA2_Channel4_5_IRQChannel)) 00158 00159 00160 /* System Handlers -----------------------------------------------------------*/ 00161 #define SystemHandler_NMI ((u32)0x00001F) /* NMI Handler */ 00162 #define SystemHandler_HardFault ((u32)0x000000) /* Hard Fault Handler */ 00163 #define SystemHandler_MemoryManage ((u32)0x043430) /* Memory Manage Handler */ 00164 #define SystemHandler_BusFault ((u32)0x547931) /* Bus Fault Handler */ 00165 #define SystemHandler_UsageFault ((u32)0x24C232) /* Usage Fault Handler */ 00166 #define SystemHandler_SVCall ((u32)0x01FF40) /* SVCall Handler */ 00167 #define SystemHandler_DebugMonitor ((u32)0x0A0080) /* Debug Monitor Handler */ 00168 #define SystemHandler_PSV ((u32)0x02829C) /* PSV Handler */ 00169 #define SystemHandler_SysTick ((u32)0x02C39A) /* SysTick Handler */ 00170 00171 #define IS_CONFIG_SYSTEM_HANDLER(HANDLER) (((HANDLER) == SystemHandler_MemoryManage) || \ 00172 ((HANDLER) == SystemHandler_BusFault) || \ 00173 ((HANDLER) == SystemHandler_UsageFault)) 00174 00175 #define IS_PRIORITY_SYSTEM_HANDLER(HANDLER) (((HANDLER) == SystemHandler_MemoryManage) || \ 00176 ((HANDLER) == SystemHandler_BusFault) || \ 00177 ((HANDLER) == SystemHandler_UsageFault) || \ 00178 ((HANDLER) == SystemHandler_SVCall) || \ 00179 ((HANDLER) == SystemHandler_DebugMonitor) || \ 00180 ((HANDLER) == SystemHandler_PSV) || \ 00181 ((HANDLER) == SystemHandler_SysTick)) 00182 00183 #define IS_GET_PENDING_SYSTEM_HANDLER(HANDLER) (((HANDLER) == SystemHandler_MemoryManage) || \ 00184 ((HANDLER) == SystemHandler_BusFault) || \ 00185 ((HANDLER) == SystemHandler_SVCall)) 00186 00187 #define IS_SET_PENDING_SYSTEM_HANDLER(HANDLER) (((HANDLER) == SystemHandler_NMI) || \ 00188 ((HANDLER) == SystemHandler_PSV) || \ 00189 ((HANDLER) == SystemHandler_SysTick)) 00190 00191 #define IS_CLEAR_SYSTEM_HANDLER(HANDLER) (((HANDLER) == SystemHandler_PSV) || \ 00192 ((HANDLER) == SystemHandler_SysTick)) 00193 00194 #define IS_GET_ACTIVE_SYSTEM_HANDLER(HANDLER) (((HANDLER) == SystemHandler_MemoryManage) || \ 00195 ((HANDLER) == SystemHandler_BusFault) || \ 00196 ((HANDLER) == SystemHandler_UsageFault) || \ 00197 ((HANDLER) == SystemHandler_SVCall) || \ 00198 ((HANDLER) == SystemHandler_DebugMonitor) || \ 00199 ((HANDLER) == SystemHandler_PSV) || \ 00200 ((HANDLER) == SystemHandler_SysTick)) 00201 00202 #define IS_FAULT_SOURCE_SYSTEM_HANDLER(HANDLER) (((HANDLER) == SystemHandler_HardFault) || \ 00203 ((HANDLER) == SystemHandler_MemoryManage) || \ 00204 ((HANDLER) == SystemHandler_BusFault) || \ 00205 ((HANDLER) == SystemHandler_UsageFault) || \ 00206 ((HANDLER) == SystemHandler_DebugMonitor)) 00207 00208 #define IS_FAULT_ADDRESS_SYSTEM_HANDLER(HANDLER) (((HANDLER) == SystemHandler_MemoryManage) || \ 00209 ((HANDLER) == SystemHandler_BusFault)) 00210 00211 00212 /* Vector Table Base ---------------------------------------------------------*/ 00213 #define NVIC_VectTab_RAM ((u32)0x20000000) 00214 #define NVIC_VectTab_FLASH ((u32)0x08000000) 00215 00216 #define IS_NVIC_VECTTAB(VECTTAB) (((VECTTAB) == NVIC_VectTab_RAM) || \ 00217 ((VECTTAB) == NVIC_VectTab_FLASH)) 00218 00219 /* System Low Power ----------------------------------------------------------*/ 00220 #define NVIC_LP_SEVONPEND ((u8)0x10) 00221 #define NVIC_LP_SLEEPDEEP ((u8)0x04) 00222 #define NVIC_LP_SLEEPONEXIT ((u8)0x02) 00223 00224 #define IS_NVIC_LP(LP) (((LP) == NVIC_LP_SEVONPEND) || \ 00225 ((LP) == NVIC_LP_SLEEPDEEP) || \ 00226 ((LP) == NVIC_LP_SLEEPONEXIT)) 00227 00228 /* Preemption Priority Group -------------------------------------------------*/ 00229 #define NVIC_PriorityGroup_0 ((u32)0x700) /* 0 bits for pre-emption priority 00230 4 bits for subpriority */ 00231 #define NVIC_PriorityGroup_1 ((u32)0x600) /* 1 bits for pre-emption priority 00232 3 bits for subpriority */ 00233 #define NVIC_PriorityGroup_2 ((u32)0x500) /* 2 bits for pre-emption priority 00234 2 bits for subpriority */ 00235 #define NVIC_PriorityGroup_3 ((u32)0x400) /* 3 bits for pre-emption priority 00236 1 bits for subpriority */ 00237 #define NVIC_PriorityGroup_4 ((u32)0x300) /* 4 bits for pre-emption priority 00238 0 bits for subpriority */ 00239 00240 #define IS_NVIC_PRIORITY_GROUP(GROUP) (((GROUP) == NVIC_PriorityGroup_0) || \ 00241 ((GROUP) == NVIC_PriorityGroup_1) || \ 00242 ((GROUP) == NVIC_PriorityGroup_2) || \ 00243 ((GROUP) == NVIC_PriorityGroup_3) || \ 00244 ((GROUP) == NVIC_PriorityGroup_4)) 00245 00246 #define IS_NVIC_PREEMPTION_PRIORITY(PRIORITY) ((PRIORITY) < 0x10) 00247 #define IS_NVIC_SUB_PRIORITY(PRIORITY) ((PRIORITY) < 0x10) 00248 #define IS_NVIC_OFFSET(OFFSET) ((OFFSET) < 0x0007FFFF) 00249 #define IS_NVIC_BASE_PRI(PRI) ((PRI) < 0x10) 00250 00251 /* Exported macro ------------------------------------------------------------*/ 00252 /* Exported functions ------------------------------------------------------- */ 00253 void NVIC_DeInit(void); 00254 void NVIC_SCBDeInit(void); 00255 void NVIC_PriorityGroupConfig(u32 NVIC_PriorityGroup); 00256 void NVIC_Init(NVIC_InitTypeDef* NVIC_InitStruct); 00257 void NVIC_StructInit(NVIC_InitTypeDef* NVIC_InitStruct); 00258 void NVIC_SETPRIMASK(void); 00259 void NVIC_RESETPRIMASK(void); 00260 void NVIC_SETFAULTMASK(void); 00261 void NVIC_RESETFAULTMASK(void); 00262 void NVIC_BASEPRICONFIG(u32 NewPriority); 00263 u32 NVIC_GetBASEPRI(void); 00264 u16 NVIC_GetCurrentPendingIRQChannel(void); 00265 ITStatus NVIC_GetIRQChannelPendingBitStatus(u8 NVIC_IRQChannel); 00266 void NVIC_SetIRQChannelPendingBit(u8 NVIC_IRQChannel); 00267 void NVIC_ClearIRQChannelPendingBit(u8 NVIC_IRQChannel); 00268 u16 NVIC_GetCurrentActiveHandler(void); 00269 ITStatus NVIC_GetIRQChannelActiveBitStatus(u8 NVIC_IRQChannel); 00270 u32 NVIC_GetCPUID(void); 00271 void NVIC_SetVectorTable(u32 NVIC_VectTab, u32 Offset); 00272 void NVIC_GenerateSystemReset(void); 00273 void NVIC_GenerateCoreReset(void); 00274 void NVIC_SystemLPConfig(u8 LowPowerMode, FunctionalState NewState); 00275 void NVIC_SystemHandlerConfig(u32 SystemHandler, FunctionalState NewState); 00276 void NVIC_SystemHandlerPriorityConfig(u32 SystemHandler, u8 SystemHandlerPreemptionPriority, 00277 u8 SystemHandlerSubPriority); 00278 ITStatus NVIC_GetSystemHandlerPendingBitStatus(u32 SystemHandler); 00279 void NVIC_SetSystemHandlerPendingBit(u32 SystemHandler); 00280 void NVIC_ClearSystemHandlerPendingBit(u32 SystemHandler); 00281 ITStatus NVIC_GetSystemHandlerActiveBitStatus(u32 SystemHandler); 00282 u32 NVIC_GetFaultHandlerSources(u32 SystemHandler); 00283 u32 NVIC_GetFaultAddress(u32 SystemHandler); 00284 00285 #endif /* __STM32F10x_NVIC_H */ 00286 00287 /******************* (C) COPYRIGHT 2008 STMicroelectronics *****END OF FILE****/