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00001 #ifndef CONTIKI_CLOCK_AVR_H 00002 #define CONTIKI_CLOCK_AVR_H 00003 00004 #if defined (__AVR_ATmega128__) 00005 00006 #define AVR_OUTPUT_COMPARE_INT TIMER0_COMP_vect 00007 00008 #define OCRSetup() \ 00009 /* Select internal clock */ \ 00010 ASSR = 0x00; \ 00011 \ 00012 /* Set counter to zero */ \ 00013 TCNT0 = 0; \ 00014 \ 00015 /* \ 00016 * Set comparison register: \ 00017 * Crystal freq. is F_CPU,\ 00018 * pre-scale factor is 1024, we want CLOCK_CONF_SECOND ticks / sec: \ 00019 * F_CPU = 1024 * CLOCK_CONF_SECOND * OCR0 \ 00020 */ \ 00021 OCR0 = F_CPU/1024UL/CLOCK_CONF_SECOND; \ 00022 \ 00023 /* \ 00024 * Set timer control register: \ 00025 * - prescale: 1024 (CS00 - CS02) \ 00026 * - counter reset via comparison register (WGM01) \ 00027 */ \ 00028 TCCR0 = _BV(CS00) | _BV(CS01) | _BV(CS02) | _BV(WGM01); \ 00029 \ 00030 /* Clear interrupt flag register */ \ 00031 TIFR = 0x00; \ 00032 \ 00033 /* \ 00034 * Raise interrupt when value in OCR0 is reached. Note that the \ 00035 * counter value in TCNT0 is cleared automatically. \ 00036 */ \ 00037 TIMSK = _BV (OCIE0); 00038 00039 #elif defined (__AVR_ATmega128RFA1__) && 0 00040 /* Uses the general routine below at present */ 00041 00042 #define AVR_OUTPUT_COMPARE_INT TIMER0_COMPA_vect 00043 #define OCRSetup() \ 00044 /* Select internal clock */ \ 00045 ASSR = 0x00; \ 00046 \ 00047 /* Set counter to zero */ \ 00048 TCNT0 = 0; \ 00049 \ 00050 /* \ 00051 * Set comparison register: \ 00052 * Crystal freq. is F_CPU,\ 00053 * pre-scale factor is 1024, we want CLOCK_CONF_SECOND ticks / sec: \ 00054 * F_CPU = 1024 * CLOCK_CONF_SECOND * OCR0A, less 1 for CTC mode \ 00055 */ \ 00056 OCR0A = F_CPU/1024/CLOCK_CONF_SECOND - 1; \ 00057 \ 00058 /* \ 00059 * Set timer control register: \ 00060 * - prescale: 1024 (CS00 - CS02) \ 00061 * - counter reset via comparison register (WGM01) \ 00062 */ \ 00063 TCCR0A = _BV(WGM01); \ 00064 TCCR0B = _BV(CS00) | _BV(CS02); \ 00065 \ 00066 /* Clear interrupt flag register */ \ 00067 TIFR0 = TIFR0; \ 00068 \ 00069 /* \ 00070 * Raise interrupt when value in OCR0 is reached. Note that the \ 00071 * counter value in TCNT0 is cleared automatically. \ 00072 */ \ 00073 TIMSK0 = _BV (OCIE0A); 00074 00075 00076 #elif defined (__AVR_ATmega1284P__) || (__AVR_AT90USB1287__) || (__AVR_ATmega1281__) || defined (__AVR_ATmega128RFA1__) 00077 /* 00078 The Raven has a 32768Hz watch crystal that can be used to clock the timer 00079 while the 1284p is sleeping. The Jackdaw has pads for a crystal. The crystal 00080 can be used to clock the 8 bit timer2. 00081 The 1284p routine also uses TIMER2 to sleep a variable number of seconds. 00082 It restores the values here after a wake. 00083 */ 00084 #if AVR_CONF_USE32KCRYSTAL 00085 #define AVR_OUTPUT_COMPARE_INT TIMER2_COMPA_vect 00086 #define OCRSetup() \ 00087 /* Clock from crystal on TOSC0-1 */ \ 00088 ASSR = _BV(AS2); \ 00089 \ 00090 /* Set counter to zero */ \ 00091 TCNT2 = 0; \ 00092 \ 00093 /* \ 00094 * Set comparison register: \ 00095 * Crystal freq. is 32768,\ 00096 * pre-scale factor is 8, we want CLOCK_CONF_SECOND ticks / sec: \ 00097 * 32768 = 8 * CLOCK_CONF_SECOND * OCR2A, less 1 for CTC mode\ 00098 */ \ 00099 OCR2A = 32768/8/CLOCK_CONF_SECOND - 1; \ 00100 \ 00101 /* \ 00102 * Set timer control register: \ 00103 * - prescale: 8 (CS21) \ 00104 * - counter reset via comparison register (WGM21) \ 00105 */ \ 00106 TCCR2A = _BV(WGM21); \ 00107 TCCR2B = _BV(CS21); \ 00108 \ 00109 /* Clear interrupt flag register */ \ 00110 TIFR2 = TIFR2; \ 00111 \ 00112 /* \ 00113 * Raise interrupt when value in OCR2 is reached. Note that the \ 00114 * counter value in TCNT2 is cleared automatically. \ 00115 */ \ 00116 TIMSK2 = _BV (OCIE2A); 00117 #else /* !AVR_CONF_USE32KCRYSTAL */ 00118 00119 /* Determine the largest value that can be used with 8 bit timer0 */ 00120 #ifndef F_CPU 00121 #error "Please define CPU clock speed for your platform. #define F_CPU 8000000UL is typical." 00122 #endif 00123 #if CLOCK_CONF_SECOND == 0 00124 #error "Please define timer ticks per second for your platform. #define CLOCK_CONF_SECOND 128 is typical." 00125 #endif 00126 00127 #ifdef AVR_CONF_TMR0_PRESCALE 00128 #elif F_CPU/CLOCK_CONF_SECOND < 256 00129 #define AVR_CONF_TMR0_PRESCALE 1 00130 #elif F_CPU/CLOCK_CONF_SECOND < 256 * 8 00131 #define AVR_CONF_TMR0_PRESCALE 8 00132 #elif F_CPU/CLOCK_CONF_SECOND < 256 * 64 00133 #define AVR_CONF_TMR0_PRESCALE 64 00134 #elif F_CPU/CLOCK_CONF_SECOND < 256 * 256 00135 #define AVR_CONF_TMR0_PRESCALE 256 00136 #else 00137 #define AVR_CONF_TMR0_PRESCALE 1024 00138 #endif 00139 00140 #if F_CPU/CLOCK_CONF_SECOND/AVR_CONF_TMR0_PRESCALE > 255 00141 #error "Can not prescale CPU clock to get specified ticks per second. F_CPU/CLOCK_CONF_SECOND/1024 must be less than 256." 00142 #endif 00143 00144 #if AVR_CONF_TMR0_PRESCALE == 1 00145 #define AVR_TCCR0B_CONF _BV(CS00) 00146 #elif AVR_CONF_TMR0_PRESCALE == 8 00147 #define AVR_TCCR0B_CONF _BV(CS01) 00148 #elif AVR_CONF_TMR0_PRESCALE == 64 00149 #define AVR_TCCR0B_CONF _BV(CS01) | _BV(CS00) 00150 #elif AVR_CONF_TMR0_PRESCALE == 256 00151 #define AVR_TCCR0B_CONF _BV(CS02) 00152 #elif AVR_CONF_TMR0_PRESCALE == 1024 00153 #define AVR_TCCR0B_CONF _BV(CS02) | _BV(CS00) 00154 #else 00155 #error "Prescale factor not supported. Allowed values are 1,8,64,256,1024." 00156 #endif 00157 00158 #define AVR_OUTPUT_COMPARE_INT TIMER0_COMPA_vect 00159 00160 #define OCRSetup() \ 00161 /* Select internal clock */ \ 00162 ASSR = 0x00; \ 00163 \ 00164 /* Set counter to zero */ \ 00165 TCNT0 = 0; \ 00166 \ 00167 /* \ 00168 * Set comparison register: \ 00169 * Crystal freq. is F_CPU, prescale is given, \ 00170 * We want CLOCK_CONF_SECOND ticks / sec: \ 00171 * F_CPU = AVR_CONF_TMR0_PRESCALE * CLOCK_CONF_SECOND * OCR2A, less 1 for CTC mode \ 00172 */ \ 00173 OCR0A = F_CPU/AVR_CONF_TMR0_PRESCALE/CLOCK_CONF_SECOND - 1; \ 00174 \ 00175 /* \ 00176 * Set timer control register: \ 00177 * - prescale according to AVR_CONF_TMR0_PRESCALE \ 00178 * - counter reset via comparison register (WGM01) \ 00179 */ \ 00180 TCCR0A = _BV(WGM01); \ 00181 TCCR0B = AVR_TCCR0B_CONF; \ 00182 \ 00183 /* Clear interrupt flag register */ \ 00184 TIFR0 = TIFR0; \ 00185 \ 00186 /* \ 00187 * Raise interrupt when value in OCR0 is reached. Note that the \ 00188 * counter value in TCNT0 is cleared automatically. \ 00189 */ \ 00190 TIMSK0 = _BV (OCIE0A); 00191 #endif /* AVR_CONF_USE32KCRYSTAL */ 00192 00193 #elif defined (__AVR_ATmega644__) || defined (__AVR_ATmega328P__) 00194 00195 #define OCRSetup() \ 00196 /* Set counter to zero */ \ 00197 TCNT0 = 0; \ 00198 \ 00199 /* \ 00200 * Set comparison register: \ 00201 * Crystal freq. is F_CPU,\ 00202 * pre-scale factor is 256, want CLOCK_CONF_SECOND ticks / sec: \ 00203 */ \ 00204 OCR0A = F_CPU/256UL/CLOCK_CONF_SECOND - 1; \ 00205 \ 00206 /* \ 00207 * Set timer control register: \ 00208 * - prescale: 256 (CS02) \ 00209 * - counter reset via comparison register (WGM01) \ 00210 */ \ 00211 TCCR0A = _BV(WGM01); \ 00212 TCCR0B = _BV(CS02); \ 00213 \ 00214 /* Clear interrupt flag register */ \ 00215 TIFR0 = 0x00; \ 00216 \ 00217 /* \ 00218 * Raise interrupt when value in OCR0 is reached. Note that the \ 00219 * counter value in TCNT0 is cleared automatically. \ 00220 */ \ 00221 TIMSK0 = _BV (OCIE0A); 00222 00223 #define AVR_OUTPUT_COMPARE_INT TIMER0_COMPA_vect 00224 00225 #elif defined (__AVR_ATmega8515__) || defined (__AVR_ATmega16__) || defined (__AVR_ATmega32__) 00226 00227 #define AVR_OUTPUT_COMPARE_INT TIMER0_COMP_vect 00228 00229 #define OCRSetup() \ 00230 /* Set counter to zero */ \ 00231 TCNT0 = 0; \ 00232 \ 00233 /* \ 00234 * Set comparison register: \ 00235 * Crystal freq. is F_CPU,\ 00236 * pre-scale factor is 256, we want CLOCK_CONF_SECOND ticks / sec: \ 00237 * F_CPU = 256 * CLOCK_CONF_SECOND * OCR0 \ 00238 */ \ 00239 OCR0 = F_CPU/256UL/CLOCK_CONF_SECOND; \ 00240 \ 00241 /* \ 00242 * Set timer control register: \ 00243 * - prescale: 256 (CS02) \ 00244 * - counter reset via comparison register (WGM01) \ 00245 */ \ 00246 TCCR0 = _BV(CS02) | _BV(WGM01); \ 00247 \ 00248 /* Clear interrupt flag register */ \ 00249 TIFR = 0x00; \ 00250 \ 00251 /* \ 00252 * Raise interrupt when value in OCR0 is reached. Note that the \ 00253 * counter value in TCNT0 is cleared automatically. \ 00254 */ \ 00255 TIMSK = _BV (OCIE0); 00256 00257 #elif defined (__AVR_ATmega8__) 00258 00259 #define AVR_OUTPUT_COMPARE_INT TIMER2_COMP_vect 00260 00261 #define OCRSetup() \ 00262 /* Set counter to zero */ \ 00263 TCNT2 = 0; \ 00264 \ 00265 /* \ 00266 * Set comparison register: \ 00267 * Crystal freq. is F_CPU,\ 00268 * pre-scale factor is 256, we want CLOCK_CONF_SECOND ticks / sec: \ 00269 * F_CPU = 256 * CLOCK_CONF_SECOND * OCR2 \ 00270 */ \ 00271 OCR2 = F_CPU/256UL/CLOCK_CONF_SECOND; \ 00272 \ 00273 /* \ 00274 * Set timer control register: \ 00275 * - prescale: 256 (CS21 CS22) \ 00276 * - counter reset via comparison register (WGM21) \ 00277 */ \ 00278 TCCR2 = _BV(CS22) | _BV(CS21) | _BV(WGM21); \ 00279 \ 00280 /* Clear interrupt flag register */ \ 00281 TIFR = 0x00; \ 00282 \ 00283 /* \ 00284 * Raise interrupt when value in OCR2 is reached. Note that the \ 00285 * counter value in TCNT2 is cleared automatically. \ 00286 */ \ 00287 TIMSK = _BV (OCIE2); 00288 #else 00289 #error "Setup CPU in clock-avr.h" 00290 #endif 00291 00292 #endif //CONTIKI_CLOCK_AVR_H