Contiki 2.6
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00001 /* Copyright (c) 2008, Swedish Institute of Computer Science 00002 * All rights reserved. 00003 * 00004 * Additional fixes for AVR contributed by: 00005 * 00006 * Colin O'Flynn coflynn@newae.com 00007 * Eric Gnoske egnoske@gmail.com 00008 * Blake Leverett bleverett@gmail.com 00009 * Mike Vidales mavida404@gmail.com 00010 * Kevin Brown kbrown3@uccs.edu 00011 * Nate Bohlmann nate@elfwerks.com 00012 * David Kopf dak664@embarqmail.com 00013 * 00014 * All rights reserved. 00015 * 00016 * Redistribution and use in source and binary forms, with or without 00017 * modification, are permitted provided that the following conditions are met: 00018 * 00019 * * Redistributions of source code must retain the above copyright 00020 * notice, this list of conditions and the following disclaimer. 00021 * * Redistributions in binary form must reproduce the above copyright 00022 * notice, this list of conditions and the following disclaimer in 00023 * the documentation and/or other materials provided with the 00024 * distribution. 00025 * * Neither the name of the copyright holders nor the names of 00026 * contributors may be used to endorse or promote products derived 00027 * from this software without specific prior written permission. 00028 * 00029 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 00030 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 00031 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 00032 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 00033 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 00034 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 00035 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 00036 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 00037 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 00038 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 00039 * POSSIBILITY OF SUCH DAMAGE. 00040 */ 00041 00042 /** 00043 * \addtogroup hal 00044 * @{ 00045 */ 00046 00047 /** 00048 * \file 00049 * \brief This file contains low-level radio driver code. 00050 * 00051 * $Id: hal.h,v 1.5 2010/12/03 20:42:01 dak664 Exp $ 00052 */ 00053 00054 #ifndef HAL_AVR_H 00055 #define HAL_AVR_H 00056 /*============================ INCLUDE =======================================*/ 00057 #include <stdint.h> 00058 #include <stdbool.h> 00059 //#include <util/crc16.h> 00060 #include "contiki-conf.h" 00061 /*============================ MACROS ========================================*/ 00062 00063 // TEST CODE 00064 #define TRIG1 DDRB |= 0x04, PINB |= 0x04 00065 #define TRIG2 DDRD |= 0x80, PIND |= 0x80 00066 00067 /** \name This is the list of pin configurations needed for a given platform. 00068 * \brief Change these values to port to other platforms. 00069 * \{ 00070 */ 00071 /* Define all possible platform types/revisions here. */ 00072 // Don't use zero, it will match if undefined! 00073 // RAVEN_D : Raven kit with LCD display 00074 // RAVENUSB_C : used for RZRAVEN USB key 00075 // RCB_B : RZ200 kit from Atmel based on 1281V 00076 // ZIGBIT : Zigbit module from Meshnetics 00077 // ATMEGA128RFA1 : Bare chip with internal radio 00078 // IRIS : IRIS Mote from MEMSIC 00079 #define RAVENUSB_C 1 00080 #define RAVEN_D 2 00081 #define RCB_B 3 00082 #define ZIGBIT 4 00083 #define IRIS 5 00084 #define ATMEGA128RFA1 6 00085 00086 #if PLATFORM_TYPE == RCB_B 00087 /* 1281 rcb */ 00088 # define SSPORT B 00089 # define SSPIN (0x00) 00090 # define SPIPORT B 00091 # define MOSIPIN (0x02) 00092 # define MISOPIN (0x03) 00093 # define SCKPIN (0x01) 00094 # define RSTPORT B 00095 # define RSTPIN (0x05) 00096 # define IRQPORT D 00097 # define IRQPIN (0x04) 00098 # define SLPTRPORT B 00099 # define SLPTRPIN (0x04) 00100 # define USART 1 00101 # define USARTVECT USART1_RX_vect 00102 # define TICKTIMER 3 00103 # define HAS_SPARE_TIMER 00104 00105 #elif PLATFORM_TYPE == ZIGBIT 00106 /* 1281V Zigbit */ 00107 # define SSPORT B 00108 # define SSPIN (0x00) 00109 # define SPIPORT B 00110 # define MOSIPIN (0x02) 00111 # define MISOPIN (0x03) 00112 # define SCKPIN (0x01) 00113 # define RSTPORT A 00114 # define RSTPIN (0x07) 00115 # define IRQPORT E 00116 # define IRQPIN (0x05) 00117 # define SLPTRPORT B 00118 # define SLPTRPIN (0x04) 00119 # define TXCWPORT B 00120 # define TXCWPIN (0x07) 00121 # define USART 1 00122 # define USARTVECT USART1_RX_vect 00123 //# define TICKTIMER 3 00124 //# define HAS_SPARE_TIMER // Not used 00125 00126 00127 #elif PLATFORM_TYPE == RAVEN_D 00128 /* 1284 raven */ 00129 # define SSPORT B 00130 # define SSPIN (0x04) 00131 # define SPIPORT B 00132 # define MOSIPIN (0x05) 00133 # define MISOPIN (0x06) 00134 # define SCKPIN (0x07) 00135 # define RSTPORT B 00136 # define RSTPIN (0x01) 00137 # define IRQPORT D 00138 # define IRQPIN (0x06) 00139 # define SLPTRPORT B 00140 # define SLPTRPIN (0x03) 00141 # define TXCWPORT B 00142 # define TXCWPIN (0x00) 00143 # define USART 1 00144 # define USARTVECT USART1_RX_vect 00145 # define TICKTIMER 3 00146 # define HAS_CW_MODE 00147 # define HAS_SPARE_TIMER 00148 00149 #elif PLATFORM_TYPE == RAVENUSB_C 00150 /* 1287USB raven */ 00151 # define SSPORT B 00152 # define SSPIN (0x00) 00153 # define SPIPORT B 00154 # define MOSIPIN (0x02) 00155 # define MISOPIN (0x03) 00156 # define SCKPIN (0x01) 00157 # define RSTPORT B 00158 # define RSTPIN (0x05) 00159 # define IRQPORT D 00160 # define IRQPIN (0x04) 00161 # define SLPTRPORT B 00162 # define SLPTRPIN (0x04) 00163 # define TXCWPORT B 00164 # define TXCWPIN (0x07) 00165 # define USART 1 00166 # define USARTVECT USART1_RX_vect 00167 # define TICKTIMER 3 00168 # define HAS_CW_MODE 00169 # define HAS_SPARE_TIMER 00170 00171 #elif PLATFORM_TYPE == ATMEGA128RFA1 00172 /* ATmega1281 with internal AT86RF231 radio */ 00173 # define SLPTRPORT TRXPR 00174 # define SLPTRPIN 1 00175 # define USART 1 00176 # define USARTVECT USART1_RX_vect 00177 # define TICKTIMER 3 00178 # define HAS_CW_MODE 00179 # define HAS_SPARE_TIMER 00180 00181 #elif CONTIKI_TARGET_MULLE 00182 /* mulle 5.2 (TODO: move to platform specific) */ 00183 # define SSPORT 3 00184 # define SSPIN 5 00185 # define MOSIPORT 1 00186 # define MOSIPIN 1 00187 # define MISOPORT 1 00188 # define MISOPIN 0 00189 # define SCKPORT 3 00190 # define SCKPIN 3 00191 # define RSTPORT 4 00192 # define RSTPIN 3 00193 # define IRQPORT 8 00194 # define IRQPIN 3 00195 # define SLPTRPORT 0 00196 # define SLPTRPIN 7 00197 # define HAS_SPARE_TIMER 00198 00199 #elif PLATFORM_TYPE == IRIS 00200 /* 1281 IRIS */ 00201 # define SSPORT B 00202 # define SSPIN (0x00) 00203 # define SPIPORT B 00204 # define MOSIPIN (0x02) 00205 # define MISOPIN (0x03) 00206 # define SCKPIN (0x01) 00207 # define RSTPORT A 00208 # define RSTPIN (0x06) 00209 # define IRQPORT D 00210 # define IRQPIN (0x04) 00211 # define SLPTRPORT B 00212 # define SLPTRPIN (0x07) 00213 //# define TXCWPORT B 00214 //# define TXCWPIN (0x07) 00215 # define USART 1 00216 # define USARTVECT USART1_RX_vect 00217 //# define TICKTIMER 3 00218 //# define HAS_SPARE_TIMER // Not used 00219 #else 00220 00221 #error "PLATFORM_TYPE undefined in hal.h" 00222 00223 #endif 00224 00225 /* For architectures that have all SPI signals on the same port */ 00226 #ifndef SSPORT 00227 #define SSPORT SPIPORT 00228 #endif 00229 00230 #ifndef SCKPORT 00231 #define SCKPORT SPIPORT 00232 #endif 00233 00234 #ifndef MOSIPORT 00235 #define MOSIPORT SPIPORT 00236 #endif 00237 00238 #ifndef MISOPORT 00239 #define MISOPORT SPIPORT 00240 #endif 00241 00242 /** \} */ 00243 00244 /** 00245 * \name Macros used to generate read register names from platform-specific definitions of ports. 00246 * \brief The various CAT macros (DDR, PORT, and PIN) are used to 00247 * assign port/pin/DDR names to various macro variables. The 00248 * variables are assigned based on the specific connections made in 00249 * the hardware. For example TCCR(TICKTIMER,A) can be used in place of TCCR0A 00250 * if TICKTIMER is defined as 0. 00251 * \{ 00252 */ 00253 #if defined(__AVR__) 00254 #define CAT(x, y) x##y 00255 #define CAT2(x, y, z) x##y##z 00256 #define DDR(x) CAT(DDR, x) 00257 #define PORT(x) CAT(PORT, x) 00258 #define PIN(x) CAT(PIN, x) 00259 #define UCSR(num, let) CAT2(UCSR,num,let) 00260 #define RXEN(x) CAT(RXEN,x) 00261 #define TXEN(x) CAT(TXEN,x) 00262 #define TXC(x) CAT(TXC,x) 00263 #define RXC(x) CAT(RXC,x) 00264 #define RXCIE(x) CAT(RXCIE,x) 00265 #define UCSZ(x,y) CAT2(UCSZ,x,y) 00266 #define UBRR(x,y) CAT2(UBRR,x,y) 00267 #define UDRE(x) CAT(UDRE,x) 00268 #define UDRIE(x) CAT(UDRIE,x) 00269 #define UDR(x) CAT(UDR,x) 00270 #define TCNT(x) CAT(TCNT,x) 00271 #define TIMSK(x) CAT(TIMSK,x) 00272 #define TCCR(x,y) CAT2(TCCR,x,y) 00273 #define COM(x,y) CAT2(COM,x,y) 00274 #define OCR(x,y) CAT2(OCR,x,y) 00275 #define CS(x,y) CAT2(CS,x,y) 00276 #define WGM(x,y) CAT2(WGM,x,y) 00277 #define OCIE(x,y) CAT2(OCIE,x,y) 00278 #define COMPVECT(x) CAT2(TIMER,x,_COMPA_vect) 00279 #define UDREVECT(x) CAT2(USART,x,_UDRE_vect) 00280 #define RXVECT(x) CAT2(USART,x,_RX_vect) 00281 #endif 00282 00283 /* TODO: Move to CPU specific */ 00284 #if defined(CONTIKI_TARGET_MULLE) 00285 #define CAT(x, y) x##y.BYTE 00286 #define CAT2(x, y, z) x##y##z.BYTE 00287 #define DDR(x) CAT(PD, x) 00288 #define PORT(x) CAT(P, x) 00289 #define PIN(x) CAT(P, x) 00290 #define UCSR(num, let) CAT2(UCSR,num,let) 00291 #define RXEN(x) CAT(RXEN,x) 00292 #define TXEN(x) CAT(TXEN,x) 00293 #define TXC(x) CAT(TXC,x) 00294 #define RXC(x) CAT(RXC,x) 00295 #define RXCIE(x) CAT(RXCIE,x) 00296 #define UCSZ(x,y) CAT2(UCSZ,x,y) 00297 #define UBRR(x,y) CAT2(UBRR,x,y) 00298 #define UDRE(x) CAT(UDRE,x) 00299 #define UDRIE(x) CAT(UDRIE,x) 00300 #define UDR(x) CAT(UDR,x) 00301 #define TCNT(x) CAT(TCNT,x) 00302 #define TIMSK(x) CAT(TIMSK,x) 00303 #define TCCR(x,y) CAT2(TCCR,x,y) 00304 #define COM(x,y) CAT2(COM,x,y) 00305 #define OCR(x,y) CAT2(OCR,x,y) 00306 #define CS(x,y) CAT2(CS,x,y) 00307 #define WGM(x,y) CAT2(WGM,x,y) 00308 #define OCIE(x,y) CAT2(OCIE,x,y) 00309 #define COMPVECT(x) CAT2(TIMER,x,_COMPA_vect) 00310 #define UDREVECT(x) CAT2(USART,x,_UDRE_vect) 00311 #define RXVECT(x) CAT2(USART,x,_RX_vect) 00312 #endif 00313 00314 /** \} */ 00315 00316 /** 00317 * \name Pin macros 00318 * \brief These macros convert the platform-specific pin defines into names and functions 00319 * that the source code can directly use. 00320 * \{ 00321 */ 00322 #if defined(__AVR_ATmega128RFA1__) 00323 00324 #define hal_set_rst_low( ) ( TRXPR &= ~( 1 << TRXRST ) ) /**< This macro pulls the RST pin low. */ 00325 #define hal_set_rst_high( ) ( TRXPR |= ( 1 << TRXRST ) ) /**< This macro pulls the RST pin high. */ 00326 #define hal_set_slptr_high( ) ( TRXPR |= ( 1 << SLPTR ) ) /**< This macro pulls the SLP_TR pin high. */ 00327 #define hal_set_slptr_low( ) ( TRXPR &= ~( 1 << SLPTR ) ) /**< This macro pulls the SLP_TR pin low. */ 00328 //#define hal_get_slptr( ) ( ( TRXPR & ( 1 << SLPTR ) ) >> SLPTR ) /**< Read current state of the SLP_TR pin (High/Low). */ 00329 #define hal_get_slptr( ) ( TRXPR & ( 1 << SLPTR ) ) /**< Read current state of the SLP_TR pin (High/Low). */ 00330 00331 #else 00332 #define SLP_TR SLPTRPIN /**< Pin number that corresponds to the SLP_TR pin. */ 00333 #define DDR_SLP_TR DDR( SLPTRPORT ) /**< Data Direction Register that corresponds to the port where SLP_TR is connected. */ 00334 #define PORT_SLP_TR PORT( SLPTRPORT ) /**< Port (Write Access) where SLP_TR is connected. */ 00335 #define PIN_SLP_TR PIN( SLPTRPORT ) /**< Pin (Read Access) where SLP_TR is connected. */ 00336 #define hal_set_slptr_high( ) ( PORT_SLP_TR |= ( 1 << SLP_TR ) ) /**< This macro pulls the SLP_TR pin high. */ 00337 #define hal_set_slptr_low( ) ( PORT_SLP_TR &= ~( 1 << SLP_TR ) ) /**< This macro pulls the SLP_TR pin low. */ 00338 //#define hal_get_slptr( ) ( ( PIN_SLP_TR & ( 1 << SLP_TR ) ) >> SLP_TR ) /**< Read current state of the SLP_TR pin (High/Low). */ 00339 #define hal_get_slptr( ) ( PIN_SLP_TR & ( 1 << SLP_TR ) ) /**< Read current state of the SLP_TR pin (High/Low). */ 00340 #define RST RSTPIN /**< Pin number that corresponds to the RST pin. */ 00341 #define DDR_RST DDR( RSTPORT ) /**< Data Direction Register that corresponds to the port where RST is */ 00342 #define PORT_RST PORT( RSTPORT ) /**< Port (Write Access) where RST is connected. */ 00343 #define PIN_RST PIN( RSTPORT /* BUG? */) /**< Pin (Read Access) where RST is connected. */ 00344 #define hal_set_rst_high( ) ( PORT_RST |= ( 1 << RST ) ) /**< This macro pulls the RST pin high. */ 00345 #define hal_set_rst_low( ) ( PORT_RST &= ~( 1 << RST ) ) /**< This macro pulls the RST pin low. */ 00346 #define hal_get_rst( ) ( ( PIN_RST & ( 1 << RST ) ) >> RST ) /**< Read current state of the RST pin (High/Low). */ 00347 #define HAL_SS_PIN SSPIN /**< The slave select pin. */ 00348 #define HAL_SCK_PIN SCKPIN /**< Data bit for SCK. */ 00349 #define HAL_MOSI_PIN MOSIPIN 00350 #define HAL_MISO_PIN MISOPIN 00351 #define HAL_PORT_SPI PORT( SPIPORT ) /**< The SPI module is located on PORTB. */ 00352 #define HAL_PORT_SS PORT( SSPORT ) 00353 #define HAL_PORT_SCK PORT( SCKPORT ) 00354 #define HAL_PORT_MOSI PORT( MOSIPORT ) /**< The SPI module uses GPIO might be split on different ports. */ 00355 #define HAL_PORT_MISO PORT( MISOPORT ) /**< The SPI module uses GPIO might be split on different ports. */ 00356 #define HAL_DDR_SPI DDR( SPIPORT ) /**< Data Direction Register for PORTB. */ 00357 #define HAL_DDR_SS DDR( SSPORT ) /**< Data Direction Register for MISO GPIO pin. */ 00358 #define HAL_DDR_SCK DDR( SCKPORT ) /**< Data Direction Register for MISO GPIO pin. */ 00359 #define HAL_DDR_MOSI DDR( MOSIPORT ) /**< Data Direction Register for MISO GPIO pin. */ 00360 #define HAL_DDR_MISO DDR( MISOPORT ) /**< Data Direction Register for MOSI GPIO pin. */ 00361 #define HAL_DD_SS SSPIN /**< Data Direction bit for SS. */ 00362 #define HAL_DD_SCK SCKPIN /**< Data Direction bit for SCK. */ 00363 #define HAL_DD_MOSI MOSIPIN /**< Data Direction bit for MOSI. */ 00364 #define HAL_DD_MISO MISOPIN /**< Data Direction bit for MISO. */ 00365 #endif /* defined(__AVR_ATmega128RFA1__) */ 00366 00367 /** \} */ 00368 00369 00370 #define HAL_SS_HIGH( ) (HAL_PORT_SS |= ( 1 << HAL_SS_PIN )) /**< MACRO for pulling SS high. */ 00371 #define HAL_SS_LOW( ) (HAL_PORT_SS &= ~( 1 << HAL_SS_PIN )) /**< MACRO for pulling SS low. */ 00372 00373 /** \brief Macros defined for HAL_TIMER1. 00374 * 00375 * These macros are used to define the correct setupt of the AVR's Timer1, and 00376 * to ensure that the hal_get_system_time function returns the system time in 00377 * symbols (16 us ticks). 00378 */ 00379 00380 #if defined(__AVR__) 00381 #if ( F_CPU == 16000000UL ) 00382 #define HAL_TCCR1B_CONFIG ( ( 1 << ICES1 ) | ( 1 << CS12 ) ) 00383 #define HAL_US_PER_SYMBOL ( 1 ) 00384 #define HAL_SYMBOL_MASK ( 0xFFFFffff ) 00385 #elif ( F_CPU == 0x800000UL ) 00386 #define HAL_TCCR1B_CONFIG ( ( 1 << ICES1 ) | ( 1 << CS11 ) | ( 1 << CS10 ) ) 00387 #define HAL_US_PER_SYMBOL ( 2 ) 00388 #define HAL_SYMBOL_MASK ( 0x7FFFffff ) 00389 #elif ( F_CPU == 8000000UL ) 00390 #define HAL_TCCR1B_CONFIG ( ( 1 << ICES1 ) | ( 1 << CS11 ) | ( 1 << CS10 ) ) 00391 #define HAL_US_PER_SYMBOL ( 2 ) 00392 #define HAL_SYMBOL_MASK ( 0x7FFFffff ) 00393 //#elif ( F_CPU == 7953408UL ) 00394 #elif ( F_CPU == 7954432UL ) 00395 #define HAL_TCCR1B_CONFIG ( ( 1 << ICES1 ) | ( 1 << CS11 ) | ( 1 << CS10 ) ) 00396 #define HAL_US_PER_SYMBOL ( 2 ) 00397 #define HAL_SYMBOL_MASK ( 0x7FFFffff ) 00398 #elif ( F_CPU == 4000000UL ) 00399 #define HAL_TCCR1B_CONFIG ( ( 1 << ICES1 ) | ( 1 << CS11 ) | ( 1 << CS10 ) ) 00400 #define HAL_US_PER_SYMBOL ( 1 ) 00401 #define HAL_SYMBOL_MASK ( 0xFFFFffff ) 00402 #elif ( F_CPU == 1000000UL ) 00403 #define HAL_TCCR1B_CONFIG ( ( 1 << ICES1 ) | ( 1 << CS11 ) ) 00404 #define HAL_US_PER_SYMBOL ( 2 ) 00405 #define HAL_SYMBOL_MASK ( 0x7FFFffff ) 00406 #else 00407 #error "Clock speed not supported." 00408 #endif 00409 00410 #if PLATFORM_TYPE == ZIGBIT 00411 // IRQ E5 for Zigbit example 00412 #define RADIO_VECT INT5_vect 00413 #define HAL_ENABLE_RADIO_INTERRUPT( ) { ( EIMSK |= ( 1 << INT5 ) ) ; EICRB |= 0x0C ; PORTE &= ~(1<<PE5); DDRE &= ~(1<<DDE5); } 00414 #define HAL_DISABLE_RADIO_INTERRUPT( ) ( EIMSK &= ~( 1 << INT5 ) ) 00415 #else 00416 #define RADIO_VECT TIMER1_CAPT_vect 00417 // Raven and Jackdaw 00418 #define HAL_ENABLE_RADIO_INTERRUPT( ) ( TIMSK1 |= ( 1 << ICIE1 ) ) 00419 #define HAL_DISABLE_RADIO_INTERRUPT( ) ( TIMSK1 &= ~( 1 << ICIE1 ) ) 00420 #endif 00421 00422 #define HAL_ENABLE_OVERFLOW_INTERRUPT( ) ( TIMSK1 |= ( 1 << TOIE1 ) ) 00423 #define HAL_DISABLE_OVERFLOW_INTERRUPT( ) ( TIMSK1 &= ~( 1 << TOIE1 ) ) 00424 00425 /** This macro will protect the following code from interrupts.*/ 00426 #define HAL_ENTER_CRITICAL_REGION( ) {uint8_t volatile saved_sreg = SREG; cli( ) 00427 00428 /** This macro must always be used in conjunction with HAL_ENTER_CRITICAL_REGION 00429 so that interrupts are enabled again.*/ 00430 #define HAL_LEAVE_CRITICAL_REGION( ) SREG = saved_sreg;} 00431 00432 #else /* MULLE */ 00433 00434 #define HAL_ENABLE_RADIO_INTERRUPT( ) ( INT1IC.BYTE |= 1 ) 00435 #define HAL_DISABLE_RADIO_INTERRUPT( ) ( INT1IC.BYTE &= ~(1) ) 00436 00437 #define HAL_ENABLE_OVERFLOW_INTERRUPT( ) ( TB4IC.BYTE = 1 ) 00438 #define HAL_DISABLE_OVERFLOW_INTERRUPT( ) ( TB4IC.BYTE = 0 ) 00439 00440 /** This macro will protect the following code from interrupts.*/ 00441 #define HAL_ENTER_CRITICAL_REGION( ) MULLE_ENTER_CRITICAL_REGION( ) 00442 00443 /** This macro must always be used in conjunction with HAL_ENTER_CRITICAL_REGION 00444 so that interrupts are enabled again.*/ 00445 #define HAL_LEAVE_CRITICAL_REGION( ) MULLE_LEAVE_CRITICAL_REGION( ) 00446 00447 #endif /* !__AVR__ */ 00448 00449 00450 /** \brief Enable the interrupt from the radio transceiver. 00451 */ 00452 #define hal_enable_trx_interrupt( ) HAL_ENABLE_RADIO_INTERRUPT( ) 00453 00454 /** \brief Disable the interrupt from the radio transceiver. 00455 * 00456 * \retval 0 if the pin is low, 1 if the pin is high. 00457 */ 00458 #define hal_disable_trx_interrupt( ) HAL_DISABLE_RADIO_INTERRUPT( ) 00459 /*============================ TYPDEFS =======================================*/ 00460 /*============================ PROTOTYPES ====================================*/ 00461 /*============================ MACROS ========================================*/ 00462 /** \name Macros for radio operation. 00463 * \{ 00464 */ 00465 #define HAL_BAT_LOW_MASK ( 0x80 ) /**< Mask for the BAT_LOW interrupt. */ 00466 #define HAL_TRX_UR_MASK ( 0x40 ) /**< Mask for the TRX_UR interrupt. */ 00467 #define HAL_TRX_END_MASK ( 0x08 ) /**< Mask for the TRX_END interrupt. */ 00468 #define HAL_RX_START_MASK ( 0x04 ) /**< Mask for the RX_START interrupt. */ 00469 #define HAL_PLL_UNLOCK_MASK ( 0x02 ) /**< Mask for the PLL_UNLOCK interrupt. */ 00470 #define HAL_PLL_LOCK_MASK ( 0x01 ) /**< Mask for the PLL_LOCK interrupt. */ 00471 00472 #define HAL_MIN_FRAME_LENGTH ( 0x03 ) /**< A frame should be at least 3 bytes. */ 00473 #define HAL_MAX_FRAME_LENGTH ( 0x7F ) /**< A frame should no more than 127 bytes. */ 00474 /** \} */ 00475 /*============================ TYPDEFS =======================================*/ 00476 /** \struct hal_rx_frame_t 00477 * \brief This struct defines the rx data container. 00478 * 00479 * \see hal_frame_read 00480 */ 00481 typedef struct{ 00482 uint8_t length; /**< Length of frame. */ 00483 uint8_t data[ HAL_MAX_FRAME_LENGTH ]; /**< Actual frame data. */ 00484 uint8_t lqi; /**< LQI value for received frame. */ 00485 bool crc; /**< Flag - did CRC pass for received frame? */ 00486 } hal_rx_frame_t; 00487 00488 /** RX_START event handler callback type. Is called with timestamp in IEEE 802.15.4 symbols and frame length. See hal_set_rx_start_event_handler(). */ 00489 typedef void (*hal_rx_start_isr_event_handler_t)(uint32_t const isr_timestamp, uint8_t const frame_length); 00490 00491 /** RRX_END event handler callback type. Is called with timestamp in IEEE 802.15.4 symbols and frame length. See hal_set_trx_end_event_handler(). */ 00492 typedef void (*hal_trx_end_isr_event_handler_t)(uint32_t const isr_timestamp); 00493 00494 typedef void (*rx_callback_t) (uint16_t data); 00495 00496 /*============================ PROTOTYPES ====================================*/ 00497 void hal_init( void ); 00498 00499 void hal_reset_flags( void ); 00500 uint8_t hal_get_bat_low_flag( void ); 00501 void hal_clear_bat_low_flag( void ); 00502 00503 hal_trx_end_isr_event_handler_t hal_get_trx_end_event_handler( void ); 00504 void hal_set_trx_end_event_handler( hal_trx_end_isr_event_handler_t trx_end_callback_handle ); 00505 void hal_clear_trx_end_event_handler( void ); 00506 00507 hal_rx_start_isr_event_handler_t hal_get_rx_start_event_handler( void ); 00508 void hal_set_rx_start_event_handler( hal_rx_start_isr_event_handler_t rx_start_callback_handle ); 00509 void hal_clear_rx_start_event_handler( void ); 00510 00511 uint8_t hal_get_pll_lock_flag( void ); 00512 void hal_clear_pll_lock_flag( void ); 00513 00514 /* Hack for atmega128rfa1 with integrated radio. Access registers directly, not through SPI */ 00515 #if defined(__AVR_ATmega128RFA1__) 00516 //#define hal_register_read(address) _SFR_MEM8((uint16_t)address) 00517 #define hal_register_read(address) address 00518 uint8_t hal_subregister_read( uint16_t address, uint8_t mask, uint8_t position ); 00519 void hal_subregister_write( uint16_t address, uint8_t mask, uint8_t position, 00520 uint8_t value ); 00521 00522 //#define hal_register_write(address, value) _SFR_MEM8((uint16_t)address)=value 00523 #define hal_register_write(address, value) address=value 00524 //#define hal_subregister_read( address, mask, position ) (_SFR_MEM8((uint16_t)address)&mask)>>position 00525 //#define hal_subregister_read1( address, mask, position ) (address&mask)>>position 00526 //#define hal_subregister_write( address, mask, position, value ) address=(address<<position)&mask 00527 #else 00528 uint8_t hal_register_read( uint8_t address ); 00529 void hal_register_write( uint8_t address, uint8_t value ); 00530 uint8_t hal_subregister_read( uint8_t address, uint8_t mask, uint8_t position ); 00531 void hal_subregister_write( uint8_t address, uint8_t mask, uint8_t position, 00532 uint8_t value ); 00533 #endif 00534 00535 00536 00537 //void hal_frame_read(hal_rx_frame_t *rx_frame, rx_callback_t rx_callback); 00538 /* For speed RF230BB does not use a callback */ 00539 void hal_frame_read(hal_rx_frame_t *rx_frame); 00540 void hal_frame_write( uint8_t *write_buffer, uint8_t length ); 00541 void hal_sram_read( uint8_t address, uint8_t length, uint8_t *data ); 00542 void hal_sram_write( uint8_t address, uint8_t length, uint8_t *data ); 00543 /* Number of receive buffers in RAM. */ 00544 #ifndef RF230_CONF_RX_BUFFERS 00545 #define RF230_CONF_RX_BUFFERS 1 00546 #endif 00547 00548 #endif 00549 /** @} */ 00550 /*EOF*/