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00001 /* 00002 * Copyright (c) 2010, Mariano Alvira <mar@devl.org> and other contributors 00003 * to the MC1322x project (http://mc1322x.devl.org) 00004 * All rights reserved. 00005 * 00006 * Redistribution and use in source and binary forms, with or without 00007 * modification, are permitted provided that the following conditions 00008 * are met: 00009 * 1. Redistributions of source code must retain the above copyright 00010 * notice, this list of conditions and the following disclaimer. 00011 * 2. Redistributions in binary form must reproduce the above copyright 00012 * notice, this list of conditions and the following disclaimer in the 00013 * documentation and/or other materials provided with the distribution. 00014 * 3. Neither the name of the Institute nor the names of its contributors 00015 * may be used to endorse or promote products derived from this software 00016 * without specific prior written permission. 00017 * 00018 * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND 00019 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 00020 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 00021 * ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE 00022 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 00023 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 00024 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 00025 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 00026 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 00027 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 00028 * SUCH DAMAGE. 00029 * 00030 * This file is part of libmc1322x: see http://mc1322x.devl.org 00031 * for details. 00032 * 00033 * 00034 */ 00035 00036 #ifndef ASM_H 00037 #define ASM_H 00038 00039 /* Structure-based register definitions */ 00040 /* Example use: 00041 ASM->KEY0 = 0xaabbccdd; 00042 ASM->CONTROL1bits = (struct ASM_CONTROL1) { 00043 .MASK_IRQ = 1, 00044 .CBC = 1, 00045 }; 00046 ASM->CONTROL1bits.SELF_TEST = 1; 00047 */ 00048 00049 struct ASM_struct { 00050 uint32_t KEY0; 00051 uint32_t KEY1; 00052 uint32_t KEY2; 00053 uint32_t KEY3; 00054 uint32_t DATA0; 00055 uint32_t DATA1; 00056 uint32_t DATA2; 00057 uint32_t DATA3; 00058 uint32_t CTR0; 00059 uint32_t CTR1; 00060 uint32_t CTR2; 00061 uint32_t CTR3; 00062 uint32_t CTR0_RESULT; 00063 uint32_t CTR1_RESULT; 00064 uint32_t CTR2_RESULT; 00065 uint32_t CTR3_RESULT; 00066 uint32_t CBC0_RESULT; 00067 uint32_t CBC1_RESULT; 00068 uint32_t CBC2_RESULT; 00069 uint32_t CBC3_RESULT; 00070 00071 union { 00072 uint32_t CONTROL0; 00073 struct ASM_CONTROL0 { 00074 uint32_t :24; 00075 uint32_t START:1; 00076 uint32_t CLEAR:1; 00077 uint32_t LOAD_MAC:1; 00078 uint32_t :4; 00079 uint32_t CLEAR_IRQ:1; 00080 } CONTROL0bits; 00081 }; 00082 union { 00083 uint32_t CONTROL1; 00084 struct ASM_CONTROL1 { 00085 uint32_t ON:1; 00086 uint32_t NORMAL_MODE:1; 00087 uint32_t BYPASS:1; 00088 uint32_t :21; 00089 uint32_t CBC:1; 00090 uint32_t CTR:1; 00091 uint32_t SELF_TEST:1; 00092 uint32_t :4; 00093 uint32_t MASK_IRQ:1; 00094 } CONTROL1bits; 00095 }; 00096 union { 00097 uint32_t STATUS; 00098 struct ASM_STATUS { 00099 uint32_t :24; 00100 uint32_t DONE:1; 00101 uint32_t TEST_PASS:1; 00102 uint32_t :6; 00103 } STATUSbits; 00104 }; 00105 00106 uint32_t reserved; 00107 00108 uint32_t MAC0; 00109 uint32_t MAC1; 00110 uint32_t MAC2; 00111 uint32_t MAC3; 00112 }; 00113 00114 static volatile struct ASM_struct * const ASM = (void *) (0x80008000); 00115 00116 #endif