Contiki 2.6

sleep.c

00001 /*
00002  * Copyright (c) 2010, Mariano Alvira <mar@devl.org> and other contributors
00003  * to the MC1322x project (http://mc1322x.devl.org)
00004  * All rights reserved.
00005  *
00006  * Redistribution and use in source and binary forms, with or without
00007  * modification, are permitted provided that the following conditions
00008  * are met:
00009  * 1. Redistributions of source code must retain the above copyright
00010  *    notice, this list of conditions and the following disclaimer.
00011  * 2. Redistributions in binary form must reproduce the above copyright
00012  *    notice, this list of conditions and the following disclaimer in the
00013  *    documentation and/or other materials provided with the distribution.
00014  * 3. Neither the name of the Institute nor the names of its contributors
00015  *    may be used to endorse or promote products derived from this software
00016  *    without specific prior written permission.
00017  *
00018  * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
00019  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
00020  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
00021  * ARE DISCLAIMED.  IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
00022  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
00023  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
00024  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
00025  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
00026  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
00027  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
00028  * SUCH DAMAGE.
00029  *
00030  * This file is part of libmc1322x: see http://mc1322x.devl.org
00031  * for details. 
00032  *
00033  *
00034  */
00035 
00036 #include <mc1322x.h>
00037 #include <board.h>
00038 
00039 #include "tests.h"
00040 #include "config.h"
00041 
00042 void main(void) {
00043 
00044         uart_init(INC,MOD,SAMP);
00045 
00046         *mem32(0x00401ffc) = 0x01234567;
00047         *mem32(0x00407ffc) = 0xdeadbeef;
00048         *mem32(0x0040fffc) = 0xface00ff;
00049         *mem32(0x00410000) = 0xabcd0123;
00050 
00051         putstr("sleep test\n\r");
00052         putstr("0x00401ffc: ");
00053         put_hex32(*mem32(0x00401ffc));
00054         putstr("\r\n");
00055         putstr("0x00407ffc: ");
00056         put_hex32(*mem32(0x00407ffc));
00057         putstr("\r\n");
00058         putstr("0x0040fffc: ");
00059         put_hex32(*mem32(0x0040fffc));
00060         putstr("\r\n");
00061         putstr("0x00410000: ");
00062         put_hex32(*mem32(0x00410000));
00063         putstr("\r\n");
00064 
00065         /* radio must be OFF before sleeping */
00066         /* otherwise MCU will not wake up properly */
00067         /* this is undocumented behavior */
00068 //      radio_off();
00069 
00070 #if USE_32KHZ
00071         /* turn on the 32kHz crystal */
00072         putstr("enabling 32kHz crystal\n\r");
00073         /* you have to hold it's hand with this on */
00074         /* once you start the 32xHz crystal it can only be stopped with a reset (hard or soft) */
00075         /* first, disable the ring osc */
00076         clear_bit(*CRM_RINGOSC_CNTL,0);
00077         /* enable the 32kHZ crystal */
00078         set_bit(*CRM_XTAL32_CNTL,0);
00079 
00080         /* set the XTAL32_EXISTS bit */
00081         /* the datasheet says to do this after you've check that RTC_COUNT is changing */
00082         /* the datasheet is not correct */
00083         set_bit(*CRM_SYS_CNTL,5);
00084         {
00085                 static volatile uint32_t old;
00086                 old = *CRM_RTC_COUNT;
00087                 putstr("waiting for xtal\n\r");
00088                 while(*CRM_RTC_COUNT == old) { 
00089                         continue; 
00090                 }
00091                 /* RTC has started up */
00092 
00093                 set_bit(*CRM_SYS_CNTL,5);
00094                 putstr("32kHZ xtal started\n\r");
00095 
00096         }
00097 #endif  
00098                 
00099 
00100         /* go to sleep */
00101 
00102 //      *CRM_WU_CNTL = 0; /* don't wake up */
00103         *CRM_WU_CNTL = 0x1; /* enable wakeup from wakeup timer */
00104 //      *CRM_WU_TIMEOUT = 1875000; /* wake 10 sec later if doze */
00105 #if USE_32KHZ
00106         *CRM_WU_TIMEOUT = 327680*2;
00107 #else
00108         *CRM_WU_TIMEOUT =  20000; /* wake 10 sec later if hibernate ring osc */
00109 #endif
00110 
00111         /* hobby board: 2kHz = 11uA; 32kHz = 11uA */
00112 //      *CRM_SLEEP_CNTL = 1; /* hibernate, RAM page 0 only, don't retain state, don't power GPIO */ /* approx. 2kHz = 2.0uA */
00113         /* hobby board: 2kHz = 18uA; 32kHz = 19uA */
00114 //      *CRM_SLEEP_CNTL = 0x41; /* hibernate, RAM page 0 only, retain state, don't power GPIO */ /* approx. 2kHz = 10.0uA */
00115         /* hobby board: 2kHz = 20uA; 32kHz = 21uA */
00116 //      *CRM_SLEEP_CNTL = 0x51; /* hibernate, RAM page 0&1 only, retain state, don't power GPIO */ /* approx. 2kHz = 11.7uA */
00117         /* hobby board: 2kHz = 22uA; 32kHz = 22.5uA */
00118 //      *CRM_SLEEP_CNTL = 0x61; /* hibernate, RAM page 0,1,2 only, retain state, don't power GPIO */ /* approx. 2kHz = 13.9uA */
00119         /* hobby board: 2kHz = 24uA; 32kHz = 25uA */
00120         *CRM_SLEEP_CNTL = 0x71; /* hibernate, all RAM pages, retain state, don't power GPIO */ /* approx. 2kHz = 16.1uA */
00121 //      *CRM_SLEEP_CNTL = 0xf1; /* hibernate, all RAM pages, retain state,       power GPIO */ /* consumption depends on GPIO hookup */
00122 
00123 //      *CRM_SLEEP_CNTL = 2; /* doze     , RAM page 0 only, don't retain state, don't power GPIO */ /* approx. 69.2 uA */
00124 //      *CRM_SLEEP_CNTL = 0x42; /* doze     , RAM page 0 only, retain state, don't power GPIO */ /* approx. 77.3uA */
00125 //      *CRM_SLEEP_CNTL = 0x52; /* doze     , RAM page 0&1 only, retain state, don't power GPIO */ /* approx. 78.9uA */
00126 //      *CRM_SLEEP_CNTL = 0x62; /* doze     , RAM page 0,1,2 only, retain state, don't power GPIO */ /* approx. 81.2uA */
00127 //      *CRM_SLEEP_CNTL = 0x72; /* doze     , all RAM pages, retain state, don't power GPIO */ /* approx. 83.4uA - possibly with periodic refresh*/
00128 //      *CRM_SLEEP_CNTL = 0xf2; /* doze     , all RAM pages, retain state,       power GPIO */ /* consumption depends on GPIO hookup */
00129 
00130 
00131         /* wait for the sleep cycle to complete */
00132         while((*CRM_STATUS & 0x1) == 0) { continue; }
00133         /* write 1 to sleep_sync --- this clears the bit (it's a r1wc bit) and powers down */
00134         *CRM_STATUS = 1; 
00135         
00136         /* asleep */
00137 
00138         /* wait for the awake cycle to complete */
00139         while((*CRM_STATUS & 0x1) == 0) { continue; }
00140         /* write 1 to sleep_sync --- this clears the bit (it's a r1wc bit) and finishes wakeup */
00141         *CRM_STATUS = 1; 
00142 
00143         putstr("\n\r\n\r\n\r");
00144         putstr("0x00401ffc: ");
00145         put_hex32(*mem32(0x00401ffc));
00146         putstr("\r\n");
00147         putstr("0x00407ffc: ");
00148         put_hex32(*mem32(0x00407ffc));
00149         putstr("\r\n");
00150         putstr("0x0040fffc: ");
00151         put_hex32(*mem32(0x0040fffc));
00152         putstr("\r\n");
00153         putstr("0x00410000: ");
00154         put_hex32(*mem32(0x00410000));
00155         putstr("\r\n");
00156 
00157         *GPIO_PAD_DIR0 = LED_RED;
00158 #define DELAY 400000
00159 
00160         volatile uint32_t i;
00161         while(1) {
00162 
00163                 *GPIO_DATA0 = LED_RED;
00164                 
00165                 for(i=0; i<DELAY; i++) { continue; }
00166 
00167                 *GPIO_DATA0 = 0;
00168 
00169                 for(i=0; i<DELAY; i++) { continue; }
00170 
00171         };
00172 }
00173