Contiki 2.6
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00001 /* 00002 * Copyright (c) 2009, Swedish Institute of Computer Science 00003 * All rights reserved. 00004 * 00005 * Redistribution and use in source and binary forms, with or without 00006 * modification, are permitted provided that the following conditions 00007 * are met: 00008 * 1. Redistributions of source code must retain the above copyright 00009 * notice, this list of conditions and the following disclaimer. 00010 * 2. Redistributions in binary form must reproduce the above copyright 00011 * notice, this list of conditions and the following disclaimer in the 00012 * documentation and/or other materials provided with the distribution. 00013 * 3. Neither the name of the Institute nor the names of its contributors 00014 * may be used to endorse or promote products derived from this software 00015 * without specific prior written permission. 00016 * 00017 * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND 00018 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 00019 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 00020 * ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE 00021 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 00022 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 00023 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 00024 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 00025 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 00026 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 00027 * SUCH DAMAGE. 00028 * 00029 * This file is part of the Contiki operating system. 00030 * 00031 */ 00032 00033 /** 00034 * \file 00035 * SD driver implementation using SPI. 00036 * \author 00037 * Nicolas Tsiftes <nvt@sics.se> 00038 */ 00039 00040 #ifndef SD_ARCH_H 00041 #define SD_ARCH_H 00042 00043 #include "msb430-uart1.h" 00044 00045 #ifndef U1IFG 00046 #define U1IFG IFG2 00047 #endif /* U1IFG */ 00048 00049 #define MS_DELAY(x) clock_delay(354 * (x)) 00050 00051 /* Machine-dependent macros. */ 00052 #define LOCK_SPI() do { \ 00053 if(!uart_lock(UART_MODE_SPI)) {\ 00054 return 0; \ 00055 } \ 00056 } while(0) 00057 #define UNLOCK_SPI() do { \ 00058 uart_unlock(UART_MODE_SPI); \ 00059 } while(0) 00060 00061 #define SD_CONNECTED() !(P2IN & 0x40) 00062 #define LOWER_CS() (P5OUT &= ~0x01) 00063 #define RAISE_CS() do { \ 00064 UART_WAIT_TXDONE(); \ 00065 P5OUT |= 0x01; \ 00066 UART_TX = SPI_IDLE; \ 00067 UART_WAIT_TXDONE(); \ 00068 } while(0) 00069 00070 /* Configuration parameters. */ 00071 #define SD_TRANSACTION_ATTEMPTS 512 00072 #define SD_READ_RESPONSE_ATTEMPTS 8 00073 #define SD_READ_BLOCK_ATTEMPTS 2 00074 00075 int sd_arch_init(void); 00076 void sd_arch_spi_write(int c); 00077 void sd_arch_spi_write_block(uint8_t *bytes, int amount); 00078 unsigned sd_arch_spi_read(void); 00079 00080 #endif /* !SD_ARCH_H */