Contiki 2.6

uart0.c

00001 /*
00002  * Copyright (c) 2011, Swedish Institute of Computer Science
00003  * All rights reserved.
00004  *
00005  * Redistribution and use in source and binary forms, with or without
00006  * modification, are permitted provided that the following conditions
00007  * are met:
00008  * 1. Redistributions of source code must retain the above copyright
00009  *    notice, this list of conditions and the following disclaimer.
00010  * 2. Redistributions in binary form must reproduce the above copyright
00011  *    notice, this list of conditions and the following disclaimer in the
00012  *    documentation and/or other materials provided with the distribution.
00013  * 3. Neither the name of the Institute nor the names of its contributors
00014  *    may be used to endorse or promote products derived from this software
00015  *    without specific prior written permission.
00016  *
00017  * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
00018  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
00019  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
00020  * ARE DISCLAIMED.  IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
00021  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
00022  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
00023  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
00024  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
00025  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
00026  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
00027  * SUCH DAMAGE.
00028  */
00029 
00030 /*
00031  * Yet another machine dependent MSP430X UART0 code.
00032  * IF2, etc. can not be used here... need to abstract to some macros
00033  * later.
00034  */
00035 
00036 #include "contiki.h"
00037 #include <stdlib.h>
00038 #include "sys/energest.h"
00039 #include "dev/uart0.h"
00040 #include "dev/watchdog.h"
00041 #include "isr_compat.h"
00042 
00043 static int (*uart0_input_handler)(unsigned char c);
00044 
00045 static volatile uint8_t transmitting;
00046 
00047 /*---------------------------------------------------------------------------*/
00048 uint8_t
00049 uart0_active(void)
00050 {
00051   return (UCA0STAT & UCBUSY) | transmitting;
00052 }
00053 /*---------------------------------------------------------------------------*/
00054 void
00055 uart0_set_input(int (*input)(unsigned char c))
00056 {
00057   uart0_input_handler = input;
00058 }
00059 /*---------------------------------------------------------------------------*/
00060 void
00061 uart0_writeb(unsigned char c)
00062 {
00063   watchdog_periodic();
00064   /* Loop until the transmission buffer is available. */
00065   while((UCA0STAT & UCBUSY));
00066 
00067   /* Transmit the data. */
00068   UCA0TXBUF = c;
00069 }
00070 /*---------------------------------------------------------------------------*/
00071 /**
00072  * Initalize the RS232 port.
00073  *
00074  */
00075 void
00076 uart0_init(unsigned long ubr)
00077 {
00078   /* RS232 */
00079   UCA0CTL1 |= UCSWRST;            /* Hold peripheral in reset state */
00080   UCA0CTL1 |= UCSSEL_2;           /* CLK = SMCLK */
00081 
00082   ubr = (MSP430_CPU_SPEED / ubr);
00083   UCA0BR0 = ubr & 0xff;
00084   UCA0BR1 = (ubr >> 8) & 0xff;
00085   UCA0MCTL = UCBRS_3;             /* Modulation UCBRSx = 3 */
00086   P3DIR &= ~0x20;                 /* P3.5 = USCI_A0 RXD as input */
00087   P3DIR |= 0x10;                  /* P3.4 = USCI_A0 TXD as output */
00088   P3SEL |= 0x30;                  /* P3.4,5 = USCI_A0 TXD/RXD */
00089 
00090   /*UCA0CTL1 &= ~UCSWRST;*/       /* Initialize USCI state machine */
00091 
00092   transmitting = 0;
00093 
00094   /* XXX Clear pending interrupts before enable */
00095   UCA0IE &= ~UCRXIFG;
00096   UCA0IE &= ~UCTXIFG;
00097 
00098   UCA0CTL1 &= ~UCSWRST;                   /* Initialize USCI state machine **before** enabling interrupts */
00099   UCA0IE |= UCRXIE;                        /* Enable UCA0 RX interrupt */
00100 }
00101 /*---------------------------------------------------------------------------*/
00102 ISR(USCI_A0, uart0_rx_interrupt)
00103 {
00104   uint8_t c;
00105 
00106   ENERGEST_ON(ENERGEST_TYPE_IRQ);
00107   if(UCA0IV == 2) {
00108     if(UCA0STAT & UCRXERR) {
00109       c = UCA0RXBUF;   /* Clear error flags by forcing a dummy read. */
00110     } else {
00111       c = UCA0RXBUF;
00112       if(uart0_input_handler != NULL) {
00113         if(uart0_input_handler(c)) {
00114           LPM4_EXIT;
00115         }
00116       }
00117     }
00118   }
00119   ENERGEST_OFF(ENERGEST_TYPE_IRQ);
00120 }
00121 /*---------------------------------------------------------------------------*/