Contiki 2.6

i2c.h

00001 /*
00002  * Copyright (c) 2011, Hedde Bosman <heddebosman@incas3.eu>
00003  *
00004  * I2C communication device drivers for mc1322x
00005  *
00006  * Redistribution and use in source and binary forms, with or without
00007  * modification, are permitted provided that the following conditions
00008  * are met:
00009  * 1. Redistributions of source code must retain the above copyright
00010  *    notice, this list of conditions and the following disclaimer.
00011  * 2. Redistributions in binary form must reproduce the above copyright
00012  *    notice, this list of conditions and the following disclaimer in the
00013  *    documentation and/or other materials provided with the distribution.
00014  * 3. Neither the name of the Institute nor the names of its contributors
00015  *    may be used to endorse or promote products derived from this software
00016  *    without specific prior written permission.
00017  *
00018  * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
00019  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
00020  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
00021  * ARE DISCLAIMED.  IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
00022  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
00023  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
00024  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
00025  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
00026  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
00027  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
00028  * SUCH DAMAGE.
00029  *
00030  * $Id$
00031  */
00032 
00033 #ifndef I2C_H
00034 #define I2C_H
00035 
00036 #include <stdint.h>
00037 #include "isr.h"
00038 #include "gpio.h"
00039 
00040 #define I2C_NON_BLOCKING 1
00041 
00042 /* The I2C Interrupt Service Routine */
00043 void i2c_isr (void);
00044 
00045 /* Enable the I2C module */
00046 void i2c_enable(void);
00047 
00048 /* Disable the I2C module */
00049 void i2c_disable(void);
00050 
00051 
00052 
00053 /* Returns 1 if the I2C bus is active (we or some other device are transferring data) */
00054 uint8_t i2c_busy(void);
00055 
00056 /* Returns 1 if our data is sent or received */
00057 uint8_t i2c_transferred(void); // indicates success of data last transfer (send or receive)
00058 
00059 
00060 
00061 /* start receiving data from 'slave_address' of length 'byte_ctr' and store it in 'rx_buf'
00062  * @parameter slave_addr        7bits (and will be padded with the 'receive bit')
00063  * @parameter byte_ctr          the number of bytes expected to be received
00064  * @parameter rx_buf            the buffer in which the received bytes will be stored.
00065  * 
00066  * IFDEF I2C_NON_BLOCKING THEN THIS FUNCTION RETURNS IMMEDIATLY BUT THE TRANSFER WILL ONLY 
00067  * BE COMPLETE WHEN i2c_transferred IS 1
00068  */
00069 void i2c_receiveinit( uint8_t slave_address, uint8_t byte_ctr, uint8_t *rx_buf);
00070 
00071 /* start sending data to 'slave_address' of length 'byte_ctr' found  in the buffer 'rx_buf'
00072  * @parameter slave_addr        7bits (and will be padded with the 'send bit')
00073  * @parameter byte_ctr          the number of bytes to be sent
00074  * @parameter tx_buf            the buffer in which the bytes to be sent are stored
00075  * 
00076  * IFDEF I2C_NON_BLOCKING THEN THIS FUNCTION RETURNS IMMEDIATLY BUT THE TRANSFER WILL ONLY 
00077  * BE COMPLETE WHEN i2c_transferred IS 1
00078  */
00079 void i2c_transmitinit(uint8_t slave_address, uint8_t byte_ctr, uint8_t *tx_buf);
00080 
00081 
00082 #ifndef I2C_NON_BLOCKING
00083 #define I2C_NON_BLOCKING 1
00084 #endif
00085 
00086 #if I2C_NON_BLOCKING
00087 uint8_t i2c_receive(void);
00088 void    i2c_transmit(void);
00089 #endif
00090 
00091 // TODO: see if this is better fit in platform definition
00092 #define I2C_SDA       13    //SDA == P5.1 // GPIO 13
00093 #define I2C_SCL       12    //SCL == P5.2 // GPIO 12
00094 
00095 // TODO: this could use a nice struct with bit members...
00096 
00097 #define I2C_BASE (0x80006000)
00098 
00099 #define I2CADR          ((volatile uint8_t *) ( I2C_BASE + 0x00 ))
00100 #define I2CFDR          ((volatile uint8_t *) ( I2C_BASE + 0x04 ))
00101 #define I2CCR           ((volatile uint8_t *) ( I2C_BASE + 0x08 ))
00102 #define I2CSR           ((volatile uint8_t *) ( I2C_BASE + 0x0C ))
00103 #define I2CDR           ((volatile uint8_t *) ( I2C_BASE + 0x10 ))
00104 #define I2CDFSRR        ((volatile uint8_t *) ( I2C_BASE + 0x14 ))
00105 #define I2CCKER         ((volatile uint8_t *) ( I2C_BASE + 0x18 ))
00106 
00107 // TODO: fix nice structs
00108 
00109 // i2c CR
00110 #define I2C_MEN         0x80
00111 #define I2C_MIEN        0x40
00112 #define I2C_MSTA        0x20
00113 #define I2C_MTX         0x10
00114 #define I2C_TXAK        0x08
00115 #define I2C_RSTA        0x04
00116 #define I2C_BCST        0x01
00117 
00118 // i2c SR
00119 #define I2C_MCF         0x80
00120 #define I2C_MAAS        0x40
00121 #define I2C_MBB         0x20
00122 #define I2C_MAL         0x10
00123 #define I2C_BCSTM       0x08
00124 #define I2C_SRW         0x04
00125 #define I2C_MIF         0x02
00126 #define I2C_RXAK        0x01
00127 
00128 // i2c digital filter sample rate register
00129 #define I2C_DFSR        0x3f // default = 0x10
00130 
00131 // i2c CKER
00132 #define I2C_CKEN        0x01
00133 
00134 
00135 #endif