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00001 /* 00002 * Copyright (c) 2010, Mariano Alvira <mar@devl.org> and other contributors 00003 * to the MC1322x project (http://mc1322x.devl.org) 00004 * All rights reserved. 00005 * 00006 * Redistribution and use in source and binary forms, with or without 00007 * modification, are permitted provided that the following conditions 00008 * are met: 00009 * 1. Redistributions of source code must retain the above copyright 00010 * notice, this list of conditions and the following disclaimer. 00011 * 2. Redistributions in binary form must reproduce the above copyright 00012 * notice, this list of conditions and the following disclaimer in the 00013 * documentation and/or other materials provided with the distribution. 00014 * 3. Neither the name of the Institute nor the names of its contributors 00015 * may be used to endorse or promote products derived from this software 00016 * without specific prior written permission. 00017 * 00018 * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND 00019 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 00020 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 00021 * ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE 00022 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 00023 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 00024 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 00025 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 00026 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 00027 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 00028 * SUCH DAMAGE. 00029 * 00030 * This file is part of libmc1322x: see http://mc1322x.devl.org 00031 * for details. 00032 * 00033 * 00034 */ 00035 00036 #include <mc1322x.h> 00037 #include <board.h> 00038 #include <stdio.h> 00039 00040 #include "tests.h" 00041 #include "config.h" 00042 00043 void asm_isr(void) { 00044 printf("asm isr\n\r"); 00045 ASM->CONTROL0bits.CLEAR_IRQ = 1; 00046 } 00047 00048 00049 void main(void) { 00050 volatile int i; 00051 00052 /* trim the reference osc. to 24MHz */ 00053 trim_xtal(); 00054 00055 uart_init(INC, MOD, SAMP); 00056 00057 vreg_init(); 00058 00059 enable_irq(ASM); 00060 00061 print_welcome("asm"); 00062 00063 printf("ASM Control 0: %08x\n\r", (unsigned int)ASM->CONTROL0); 00064 printf("ASM Control 1: %08x\n\r", (unsigned int)ASM->CONTROL1); 00065 printf("ASM Status: %08x\n\r", (unsigned int)ASM->STATUS); 00066 printf("ASM Test pass: %d\n\r", ASM->STATUSbits.TEST_PASS); 00067 00068 /* ASM module is disabled until self-test passes */ 00069 printf("\n\r*** ASM self-test ***\n\r"); 00070 00071 ASM->CONTROL1bits.ON = 1; 00072 ASM->CONTROL1bits.SELF_TEST = 1; 00073 ASM->CONTROL0bits.START = 1; 00074 00075 /* Self test takes 3330 periph. clocks (default 24Mhz) */ 00076 /* to complete. This doesn't wait 3330 exactly, but should be long enough */ 00077 00078 for(i = 0; i < 3330; i++) { continue; } 00079 00080 printf("ASM Test pass: %d\n\r", ASM->STATUSbits.TEST_PASS); 00081 00082 /* must clear the self test bit when done */ 00083 ASM->CONTROL1bits.SELF_TEST = 0; 00084 00085 00086 /* ASM starts in "BOOT" mode which uses an internal secret key 00087 * to load encrypted data from an external source */ 00088 /* must set to NORMAL mode */ 00089 ASM->CONTROL1bits.NORMAL_MODE = 1; 00090 00091 /* setting the bypass bit will disable the encryption */ 00092 /* bypass defaults to off */ 00093 ASM->CONTROL1bits.BYPASS = 0; 00094 00095 printf("\n\r*** set ASM key ***\n\r"); 00096 ASM->KEY0 = 0xccddeeff; 00097 ASM->KEY1 = 0x8899aabb; 00098 ASM->KEY2 = 0x44556677; 00099 ASM->KEY3 = 0x00112233; 00100 00101 /* KEY registers appear to be write-only (which is a good thing) */ 00102 /* even though the datasheet says you can read them */ 00103 printf("ASM Key [3,2,1,0] : 0x%08x%08x%08x%08x\n", 00104 (unsigned int) ASM->KEY3, 00105 (unsigned int) ASM->KEY2, 00106 (unsigned int) ASM->KEY1, 00107 (unsigned int) ASM->KEY0); 00108 00109 printf("\n\r*** CTR test ***\n\r"); 00110 printf("Encrypt\n\r"); 00111 ASM->CONTROL1bits.CTR = 1; 00112 00113 ASM->DATA0 = 0xdeaddead; 00114 ASM->DATA1 = 0xbeefbeef; 00115 ASM->DATA2 = 0xfaceface; 00116 ASM->DATA3 = 0x01234567; 00117 00118 printf("ASM Data [3,2,1,0] : 0x%08x%08x%08x%08x\n", 00119 (unsigned int) ASM->DATA3, 00120 (unsigned int) ASM->DATA2, 00121 (unsigned int) ASM->DATA1, 00122 (unsigned int) ASM->DATA0); 00123 00124 ASM->CTR0 = 0x33333333; 00125 ASM->CTR1 = 0x22222222; 00126 ASM->CTR2 = 0x11111111; 00127 ASM->CTR3 = 0x00000000; 00128 00129 printf("ASM CTR [3,2,1,0] : 0x%08x%08x%08x%08x\n", 00130 (unsigned int) ASM->CTR3, 00131 (unsigned int) ASM->CTR2, 00132 (unsigned int) ASM->CTR1, 00133 (unsigned int) ASM->CTR0); 00134 00135 ASM->CONTROL0bits.START = 1; 00136 while(ASM->STATUSbits.DONE == 0) { continue; } 00137 00138 printf("ASM CTR RESULT [3,2,1,0]: 0x%08x%08x%08x%08x\n", 00139 (unsigned int) ASM->CTR3_RESULT, 00140 (unsigned int) ASM->CTR2_RESULT, 00141 (unsigned int) ASM->CTR1_RESULT, 00142 (unsigned int) ASM->CTR0_RESULT); 00143 00144 printf("Decrypt\n\r"); 00145 00146 ASM->DATA0 = ASM->CTR0_RESULT; 00147 ASM->DATA1 = ASM->CTR1_RESULT; 00148 ASM->DATA2 = ASM->CTR2_RESULT; 00149 ASM->DATA3 = ASM->CTR3_RESULT; 00150 00151 ASM->CONTROL0bits.START = 1; 00152 while(ASM->STATUSbits.DONE == 0) { continue; } 00153 00154 printf("ASM CTR RESULT [3,2,1,0]: 0x%08x%08x%08x%08x\n", 00155 (unsigned int) ASM->CTR3_RESULT, 00156 (unsigned int) ASM->CTR2_RESULT, 00157 (unsigned int) ASM->CTR1_RESULT, 00158 (unsigned int) ASM->CTR0_RESULT); 00159 00160 printf("\n\r*** CBC MAC generation ***\n\r"); 00161 00162 ASM->CONTROL1bits.CTR = 0; 00163 ASM->CONTROL1bits.CBC = 1; 00164 00165 /* CBC is like a hash */ 00166 /* it doesn't use the CTR data */ 00167 /* the accumulated MAC is in the MAC registers */ 00168 /* you must use the CLEAR bit to reset the MAC state */ 00169 00170 ASM->DATA0 = 0xdeaddead; 00171 ASM->DATA1 = 0xbeefbeef; 00172 ASM->DATA2 = 0xfaceface; 00173 ASM->DATA3 = 0x01234567; 00174 00175 ASM->CONTROL0bits.CLEAR = 1; 00176 00177 ASM->CONTROL0bits.START = 1; 00178 while(ASM->STATUSbits.DONE == 0) { continue; } 00179 00180 printf("ASM CBC RESULT [3,2,1,0]: 0x%08x%08x%08x%08x\n", 00181 (unsigned int) ASM->CBC3_RESULT, 00182 (unsigned int) ASM->CBC2_RESULT, 00183 (unsigned int) ASM->CBC1_RESULT, 00184 (unsigned int) ASM->CBC0_RESULT); 00185 00186 printf("\n\r*** CCM (CTR+CBC) ***\n\r"); 00187 00188 ASM->CONTROL1bits.CTR = 1; 00189 ASM->CONTROL1bits.CBC = 1; 00190 ASM->CONTROL0bits.CLEAR = 1; 00191 00192 ASM->CONTROL0bits.START = 1; 00193 while(ASM->STATUSbits.DONE == 0) { continue; } 00194 00195 printf("ASM CTR RESULT [3,2,1,0]: 0x%08x%08x%08x%08x\n", 00196 (unsigned int) ASM->CTR3_RESULT, 00197 (unsigned int) ASM->CTR2_RESULT, 00198 (unsigned int) ASM->CTR1_RESULT, 00199 (unsigned int) ASM->CTR0_RESULT); 00200 00201 printf("ASM CBC RESULT [3,2,1,0]: 0x%08x%08x%08x%08x\n", 00202 (unsigned int) ASM->CBC3_RESULT, 00203 (unsigned int) ASM->CBC2_RESULT, 00204 (unsigned int) ASM->CBC1_RESULT, 00205 (unsigned int) ASM->CBC0_RESULT); 00206 00207 while(1) { 00208 } 00209 }