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00001 /* This file has been prepared for Doxygen automatic documentation generation.*/ 00002 /*! \file ********************************************************************* 00003 * 00004 * \brief 00005 * This file contains the USB driver routines. 00006 * 00007 * \addtogroup usbstick 00008 * 00009 * \author 00010 * Atmel Corporation: http://www.atmel.com \n 00011 * Support email: avr@atmel.com 00012 * 00013 ******************************************************************************/ 00014 /* Copyright (c) 2008 ATMEL Corporation 00015 All rights reserved. 00016 00017 Redistribution and use in source and binary forms, with or without 00018 modification, are permitted provided that the following conditions are met: 00019 00020 * Redistributions of source code must retain the above copyright 00021 notice, this list of conditions and the following disclaimer. 00022 * Redistributions in binary form must reproduce the above copyright 00023 notice, this list of conditions and the following disclaimer in 00024 the documentation and/or other materials provided with the 00025 distribution. 00026 * Neither the name of the copyright holders nor the names of 00027 contributors may be used to endorse or promote products derived 00028 from this software without specific prior written permission. 00029 00030 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 00031 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 00032 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 00033 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 00034 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 00035 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 00036 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 00037 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 00038 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 00039 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 00040 POSSIBILITY OF SUCH DAMAGE. 00041 */ 00042 00043 #ifndef _USB_DRV_H_ 00044 #define _USB_DRV_H_ 00045 00046 #include "compiler.h" 00047 00048 /** 00049 * \addtogroup usbdriver 00050 * @{ 00051 */ 00052 00053 //_____ I N C L U D E S ____________________________________________________ 00054 00055 00056 typedef enum endpoint_parameter{ep_num, ep_type, ep_direction, ep_size, ep_bank, nyet_status} t_endpoint_parameter; 00057 00058 00059 //_____ M A C R O S ________________________________________________________ 00060 00061 #define MAX_EP_NB 7 00062 00063 #define EP_CONTROL 0 00064 #define EP_1 1 00065 #define EP_2 2 00066 #define EP_3 3 00067 #define EP_4 4 00068 #define EP_5 5 00069 #define EP_6 6 00070 #define EP_7 7 00071 00072 #define PIPE_CONTROL 0 00073 #define PIPE_0 0 00074 #define PIPE_1 1 00075 #define PIPE_2 2 00076 #define PIPE_3 3 00077 #define PIPE_4 4 00078 #define PIPE_5 5 00079 #define PIPE_6 6 00080 #define PIPE_7 7 00081 00082 // USB EndPoint 00083 #define MSK_EP_DIR 0x7F 00084 #define MSK_UADD 0x7F 00085 #define MSK_EPTYPE 0xC0 00086 #define MSK_EPSIZE 0x70 00087 #define MSK_EPBK 0x0C 00088 #define MSK_DTSEQ 0x0C 00089 #define MSK_NBUSYBK 0x03 00090 #define MSK_CURRBK 0x03 00091 #define MSK_DAT 0xFF // UEDATX 00092 #define MSK_BYCTH 0x07 // UEBCHX 00093 #define MSK_BYCTL 0xFF // UEBCLX 00094 #define MSK_EPINT 0x7F // UEINT 00095 #define MSK_HADDR 0xFF // UHADDR 00096 00097 // USB Pipe 00098 #define MSK_PNUM 0x07 // UPNUM 00099 #define MSK_PRST 0x7F // UPRST 00100 #define MSK_PTYPE 0xC0 // UPCFG0X 00101 #define MSK_PTOKEN 0x30 00102 #define MSK_PEPNUM 0x0F 00103 #define MSK_PSIZE 0x70 // UPCFG1X 00104 #define MSK_PBK 0x0C 00105 00106 #define MSK_NBUSYBK 0x03 00107 00108 #define MSK_ERROR 0x1F 00109 00110 #define MSK_PTYPE 0xC0 // UPCFG0X 00111 #define MSK_PTOKEN 0x30 00112 #define MSK_TOKEN_SETUP 0x30 00113 #define MSK_TOKEN_IN 0x10 00114 #define MSK_TOKEN_OUT 0x20 00115 #define MSK_PEPNUM 0x0F 00116 00117 #define MSK_PSIZE 0x70 // UPCFG1X 00118 #define MSK_PBK 0x0C 00119 00120 00121 // Parameters for endpoint configuration 00122 // These define are the values used to enable and configure an endpoint. 00123 #define TYPE_CONTROL 0 00124 #define TYPE_ISOCHRONOUS 1 00125 #define TYPE_BULK 2 00126 #define TYPE_INTERRUPT 3 00127 //typedef enum ep_type {TYPE_CONTROL, TYPE_BULK, TYPE_ISOCHRONOUS, TYPE_INTERRUPT} e_ep_type; 00128 00129 #define DIRECTION_OUT 0 00130 #define DIRECTION_IN 1 00131 //typedef enum ep_dir {DIRECTION_OUT, DIRECTION_IN} e_ep_dir; 00132 00133 #define SIZE_8 0 00134 #define SIZE_16 1 00135 #define SIZE_32 2 00136 #define SIZE_64 3 00137 #define SIZE_128 4 00138 #define SIZE_256 5 00139 #define SIZE_512 6 00140 #define SIZE_1024 7 00141 //typedef enum ep_size {SIZE_8, SIZE_16, SIZE_32, SIZE_64, 00142 // SIZE_128, SIZE_256, SIZE_512, SIZE_1024} e_ep_size; 00143 00144 #define ONE_BANK 0 00145 #define TWO_BANKS 1 00146 //typedef enum ep_bank {ONE_BANK, TWO_BANKS} e_ep_bank; 00147 00148 #define NYET_ENABLED 0 00149 #define NYET_DISABLED 1 00150 //typedef enum ep_nyet {NYET_DISABLED, NYET_ENABLED} e_ep_nyet; 00151 00152 #define TOKEN_SETUP 0 00153 #define TOKEN_IN 1 00154 #define TOKEN_OUT 2 00155 00156 #define Is_ep_addr_in(x) ( (x&0x80)? TRUE : FALSE) 00157 00158 00159 //! @ingroup usbdriver 00160 //! @defgroup Endpoints_configuration Configuration macros for endpoints 00161 //! List of the standard macro used to configure pipes and endpoints 00162 //! @{ 00163 #define Usb_build_ep_config0(type, dir, nyet) ((type<<6) /*| (nyet<<1)*/ | (dir)) 00164 #define Usb_build_ep_config1(size, bank ) ((size<<4) | (bank<<2) ) 00165 #define usb_configure_endpoint(num, type, dir, size, bank, nyet) \ 00166 ( Usb_select_endpoint(num), \ 00167 usb_config_ep(Usb_build_ep_config0(type, dir, nyet),\ 00168 Usb_build_ep_config1(size, bank) )) 00169 00170 #define Host_build_pipe_config0(type, token, ep_num) ((type<<6) | (token<<4) | (ep_num)) 00171 #define Host_build_pipe_config1(size, bank ) ((size<<4) | (bank<<2) ) 00172 #define host_configure_pipe(num, type, token,ep_num, size, bank, freq) \ 00173 ( Host_select_pipe(num), \ 00174 Host_set_interrupt_frequency(freq), \ 00175 host_config_pipe(Host_build_pipe_config0(type, token, ep_num),\ 00176 Host_build_pipe_config1(size, bank) )) 00177 //! @} 00178 00179 //! @ingroup usbdriver 00180 //! @defgroup USB_regulator USB Pads Regulator drivers 00181 //! Turns ON/OFF USB pads regulator 00182 //! @{ 00183 //! Enable internal USB pads regulator 00184 #define Usb_enable_regulator() (UHWCON |= (1<<UVREGE)) 00185 //! Disable internal USB pads regulator 00186 #define Usb_disable_regulator() (UHWCON &= ~(1<<UVREGE)) 00187 //! Check regulator enable bit 00188 #define Is_usb_regulator_enabled() ((UHWCON & (1<<UVREGE)) ? TRUE : FALSE) 00189 //! @} 00190 00191 //! @ingroup usbdriver 00192 //! @defgroup gen_usb USB common management drivers 00193 //! These macros manage the USB controller 00194 //! @{ 00195 //! Enable external UID pin 00196 #define Usb_enable_uid_pin() (UHWCON |= (1<<UIDE)) 00197 //! Disable external UID pin 00198 #define Usb_disable_uid_pin() (UHWCON &= ~(1<<UIDE)) 00199 //! Disable external UID pin and force device mode 00200 #define Usb_force_device_mode() (Usb_disable_uid_pin(), UHWCON |= (1<<UIMOD)) 00201 //! Disable external UID pin and force host mode 00202 #define Usb_force_host_mode() (Usb_disable_uid_pin(), UHWCON &= ~(1<<UIMOD)) 00203 //! Enable external UVCON pin 00204 #define Usb_enable_uvcon_pin() (UHWCON |= (1<<UVCONE)) 00205 //! Enable external UVCON pin 00206 #define Usb_disable_uvcon_pin() (UHWCON &= ~(1<<UVCONE)) 00207 //! Use device full speed mode (default mode) 00208 #define Usb_full_speed_mode() (UDCON &= ~(1<<LSM)) 00209 //! For device mode, force low speed mode 00210 #define Usb_low_speed_mode() (UDCON |= (1<<LSM)) 00211 00212 //! Enable both USB interface and Vbus pad 00213 #define Usb_enable() (USBCON |= ((1<<USBE) | (1<<OTGPADE))) 00214 //! Disable both USB interface and Vbus pad 00215 #define Usb_disable() (USBCON &= ~((1<<USBE) | (1<<OTGPADE))) 00216 #define Is_usb_enabled() ((USBCON & (1<<USBE)) ? TRUE : FALSE) 00217 00218 //! Enable VBUS pad 00219 #define Usb_enable_vbus_pad() (USBCON |= (1<<OTGPADE)) 00220 //! Disable VBUS pad 00221 #define Usb_disable_vbus_pad() (USBCON &= ~(1<<OTGPADE)) 00222 00223 #define Usb_select_device() (USBCON &= ~(1<<HOST)) 00224 #define Usb_select_host() (USBCON |= (1<<HOST)) 00225 #define Is_usb_host_enabled() ((USBCON & (1<<HOST)) ? TRUE : FALSE) 00226 00227 //! Stop internal USB clock in interface (freeze the interface register) 00228 #define Usb_freeze_clock() (USBCON |= (1<<FRZCLK)) 00229 #define Usb_unfreeze_clock() (USBCON &= ~(1<<FRZCLK)) 00230 #define Is_usb_clock_freezed() ((USBCON & (1<<FRZCLK)) ? TRUE : FALSE) 00231 00232 #define Usb_enable_id_interrupt() (USBCON |= (1<<IDTE)) 00233 #define Usb_disable_id_interrupt() (USBCON &= ~(1<<IDTE)) 00234 #define Is_usb_id_interrupt_enabled() ((USBCON & (1<<IDTE)) ? TRUE : FALSE) 00235 #define Is_usb_id_device() ((USBSTA & (1<<ID)) ? TRUE : FALSE) 00236 #define Usb_ack_id_transition() (USBINT = ~(1<<IDTI)) 00237 #define Is_usb_id_transition() ((USBINT & (1<<IDTI)) ? TRUE : FALSE) 00238 00239 #define Usb_enable_vbus_interrupt() (USBCON |= (1<<VBUSTE)) 00240 #define Usb_disable_vbus_interrupt() (USBCON &= ~(1<<VBUSTE)) 00241 #define Is_usb_vbus_interrupt_enabled() ((USBCON & (1<<VBUSTE)) ? TRUE : FALSE) 00242 #define Is_usb_vbus_high() ((USBSTA & (1<<VBUS)) ? TRUE : FALSE) 00243 #define Is_usb_vbus_low() ((USBSTA & (1<<VBUS)) ? FALSE : TRUE) 00244 #define Usb_ack_vbus_transition() (USBINT = ~(1<<VBUSTI)) 00245 #define Is_usb_vbus_transition() ((USBINT & (1<<VBUSTI)) ? TRUE : FALSE) 00246 00247 //! returns the USB general interrupts (interrupt enabled) 00248 #define Usb_get_general_interrupt() (USBINT & (USBCON & MSK_IDTE_VBUSTE)) 00249 //! acks the general interrupts (interrupt enabled) 00250 #define Usb_ack_all_general_interrupt() (USBINT = ~(USBCON & MSK_IDTE_VBUSTE)) 00251 #define Usb_ack_cache_id_transition(x) ((x) &= ~(1<<IDTI)) 00252 #define Usb_ack_cache_vbus_transition(x) ((x) &= ~(1<<VBUSTI)) 00253 #define Is_usb_cache_id_transition(x) (((x) & (1<<IDTI)) ) 00254 #define Is_usb_cache_vbus_transition(x) (((x) & (1<<VBUSTI))) 00255 00256 //! returns the USB Pad interrupts (interrupt enabled) 00257 #define Usb_get_otg_interrupt() (OTGINT & OTGIEN) 00258 //! acks the USB Pad interrupts (interrupt enabled) 00259 #define Usb_ack_all_otg_interrupt() (OTGINT = ~OTGIEN) 00260 #define Is_otg_cache_bconnection_error(x) (((x) & MSK_BCERRI)) 00261 #define Usb_ack_cache_bconnection_error(x) ((x) &= ~MSK_BCERRI) 00262 00263 #define Usb_enter_dpram_mode() (UDPADDH = (1<<DPACC)) 00264 #define Usb_exit_dpram_mode() (UDPADDH = (U8)~(1<<DPACC)) 00265 #define Usb_set_dpram_address(addr) (UDPADDH = (1<<DPACC) + ((Uint16)addr >> 8), UDPADDL = (Uchar)addr) 00266 #define Usb_write_dpram_byte(val) (UEDATX=val) 00267 #define Usb_read_dpram_byte() (UEDATX) 00268 00269 //! requests for VBus activation 00270 #define Usb_enable_vbus() (OTGCON |= (1<<VBUSREQ)) 00271 //! requests for VBus desactivation 00272 #define Usb_disable_vbus() (OTGCON |= (1<<VBUSRQC)) 00273 //! Manually request VBUS without UVCON signal from USB interface 00274 #define Usb_enable_manual_vbus() (PORTE|=0x80,DDRE|=0x80,Usb_disable_uvcon_pin()) 00275 00276 //! initiates a Host Negociation Protocol 00277 #define Usb_device_initiate_hnp() (OTGCON |= (1<<HNPREQ)) 00278 //! accepts a Host Negociation Protocol 00279 #define Usb_host_accept_hnp() (OTGCON |= (1<<HNPREQ)) 00280 //! rejects a Host Negociation Protocol 00281 #define Usb_host_reject_hnp() (OTGCON &= ~(1<<HNPREQ)) 00282 //! initiates a Session Request Protocol 00283 #define Usb_device_initiate_srp() (OTGCON |= (1<<SRPREQ)) 00284 //! selects VBus as SRP method 00285 #define Usb_select_vbus_srp_method() (OTGCON |= (1<<SRPSEL)) 00286 //! selects data line as SRP method 00287 #define Usb_select_data_srp_method() (OTGCON &= ~(1<<SRPSEL)) 00288 //! enables hardware control on VBus 00289 #define Usb_enable_vbus_hw_control() (OTGCON &= ~(1<<VBUSHWC)) 00290 //! disables hardware control on VBus 00291 #define Usb_disable_vbus_hw_control() (OTGCON |= (1<<VBUSHWC)) 00292 //! tests if VBus has been requested 00293 #define Is_usb_vbus_enabled() ((OTGCON & (1<<VBUSREQ)) ? TRUE : FALSE) 00294 //! tests if a HNP occurs 00295 #define Is_usb_hnp() ((OTGCON & (1<<HNPREQ)) ? TRUE : FALSE) 00296 //! tests if a SRP from device occurs 00297 #define Is_usb_device_srp() ((OTGCON & (1<<SRPREQ)) ? TRUE : FALSE) 00298 00299 //! enables suspend time out interrupt 00300 #define Usb_enable_suspend_time_out_interrupt() (OTGIEN |= (1<<STOE)) 00301 //! disables suspend time out interrupt 00302 #define Usb_disable_suspend_time_out_interrupt() (OTGIEN &= ~(1<<STOE)) 00303 #define Is_suspend_time_out_interrupt_enabled() ((OTGIEN & (1<<STOE)) ? TRUE : FALSE) 00304 //! acks suspend time out interrupt 00305 #define Usb_ack_suspend_time_out_interrupt() (OTGINT &= ~(1<<STOI)) 00306 //! tests if a suspend time out occurs 00307 #define Is_usb_suspend_time_out_interrupt() ((OTGINT & (1<<STOI)) ? TRUE : FALSE) 00308 00309 //! enables HNP error interrupt 00310 #define Usb_enable_hnp_error_interrupt() (OTGIEN |= (1<<HNPERRE)) 00311 //! disables HNP error interrupt 00312 #define Usb_disable_hnp_error_interrupt() (OTGIEN &= ~(1<<HNPERRE)) 00313 #define Is_hnp_error_interrupt_enabled() ((OTGIEN & (1<<HNPERRE)) ? TRUE : FALSE) 00314 //! acks HNP error interrupt 00315 #define Usb_ack_hnp_error_interrupt() (OTGINT &= ~(1<<HNPERRI)) 00316 //! tests if a HNP error occurs 00317 #define Is_usb_hnp_error_interrupt() ((OTGINT & (1<<HNPERRI)) ? TRUE : FALSE) 00318 00319 //! enables role exchange interrupt 00320 #define Usb_enable_role_exchange_interrupt() (OTGIEN |= (1<<ROLEEXE)) 00321 //! disables role exchange interrupt 00322 #define Usb_disable_role_exchange_interrupt() (OTGIEN &= ~(1<<ROLEEXE)) 00323 #define Is_role_exchange_interrupt_enabled() ((OTGIEN & (1<<ROLEEXE)) ? TRUE : FALSE) 00324 //! acks role exchange interrupt 00325 #define Usb_ack_role_exchange_interrupt() (OTGINT &= ~(1<<ROLEEXI)) 00326 //! tests if a role exchange occurs 00327 #define Is_usb_role_exchange_interrupt() ((OTGINT & (1<<ROLEEXI)) ? TRUE : FALSE) 00328 00329 //! enables B device connection error interrupt 00330 #define Usb_enable_bconnection_error_interrupt() (OTGIEN |= (1<<BCERRE)) 00331 //! disables B device connection error interrupt 00332 #define Usb_disable_bconnection_error_interrupt() (OTGIEN &= ~(1<<BCERRE)) 00333 #define Is_bconnection_error_interrupt_enabled() ((OTGIEN & (1<<BCERRE)) ? TRUE : FALSE) 00334 //! acks B device connection error interrupt 00335 #define Usb_ack_bconnection_error_interrupt() (OTGINT &= ~(1<<BCERRI)) 00336 //! tests if a B device connection error occurs 00337 #define Is_usb_bconnection_error_interrupt() ((OTGINT & (1<<BCERRI)) ? TRUE : FALSE) 00338 00339 //! enables VBus error interrupt 00340 #define Usb_enable_vbus_error_interrupt() (OTGIEN |= (1<<VBERRE)) 00341 //! disables VBus error interrupt 00342 #define Usb_disable_vbus_error_interrupt() (OTGIEN &= ~(1<<VBERRE)) 00343 #define Is_vbus_error_interrupt_enabled() ((OTGIEN & (1<<VBERRE)) ? TRUE : FALSE) 00344 //! acks VBus error interrupt 00345 #define Usb_ack_vbus_error_interrupt() (OTGINT &= ~(1<<VBERRI)) 00346 //! tests if a VBus error occurs 00347 #define Is_usb_vbus_error_interrupt() ((OTGINT & (1<<VBERRI)) ? TRUE : FALSE) 00348 00349 //! enables SRP interrupt 00350 #define Usb_enable_srp_interrupt() (OTGIEN |= (1<<SRPE)) 00351 //! disables SRP interrupt 00352 #define Usb_disable_srp_interrupt() (OTGIEN &= ~(1<<SRPE)) 00353 #define Is_srp_interrupt_enabled() ((OTGIEN & (1<<SRPE)) ? TRUE : FALSE) 00354 //! acks SRP interrupt 00355 #define Usb_ack_srp_interrupt() (OTGINT &= ~(1<<SRPI)) 00356 //! tests if a SRP occurs 00357 #define Is_usb_srp_interrupt() ((OTGINT & (1<<SRPI)) ? TRUE : FALSE) 00358 //! @} 00359 00360 //! @ingroup usbdriver 00361 //! @defgroup USB_device_driver USB device controller drivers 00362 //! These macros manage the USB Device controller. 00363 //! @{ 00364 //! initiates a remote wake-up 00365 #define Usb_initiate_remote_wake_up() (UDCON |= (1<<RMWKUP)) 00366 //! detaches from USB bus 00367 #define Usb_detach() (UDCON |= (1<<DETACH)) 00368 //! attaches to USB bus 00369 #define Usb_attach() (UDCON &= ~(1<<DETACH)) 00370 //! test if remote wake-up still running 00371 #define Is_usb_pending_remote_wake_up() ((UDCON & (1<<RMWKUP)) ? TRUE : FALSE) 00372 //! test if the device is detached 00373 #define Is_usb_detached() ((UDCON & (1<<DETACH)) ? TRUE : FALSE) 00374 00375 //! returns the USB device interrupts (interrupt enabled) 00376 #define Usb_get_device_interrupt() (UDINT & (1<<UDIEN)) 00377 //! acks the USB device interrupts (interrupt enabled) 00378 #define Usb_ack_all_device_interrupt() (UDINT = ~(1<<UDIEN)) 00379 00380 //! enables remote wake-up interrupt 00381 #define Usb_enable_remote_wake_up_interrupt() (UDIEN |= (1<<UPRSME)) 00382 //! disables remote wake-up interrupt 00383 #define Usb_disable_remote_wake_up_interrupt() (UDIEN &= ~(1<<UPRSME)) 00384 #define Is_remote_wake_up_interrupt_enabled() ((UDIEN & (1<<UPRSME)) ? TRUE : FALSE) 00385 //! acks remote wake-up 00386 #define Usb_ack_remote_wake_up_start() (UDINT = ~(1<<UPRSMI)) 00387 //! tests if remote wake-up still running 00388 #define Is_usb_remote_wake_up_start() ((UDINT & (1<<UPRSMI)) ? TRUE : FALSE) 00389 00390 //! enables resume interrupt 00391 #define Usb_enable_resume_interrupt() (UDIEN |= (1<<EORSME)) 00392 //! disables resume interrupt 00393 #define Usb_disable_resume_interrupt() (UDIEN &= ~(1<<EORSME)) 00394 #define Is_resume_interrupt_enabled() ((UDIEN & (1<<EORSME)) ? TRUE : FALSE) 00395 //! acks resume 00396 #define Usb_ack_resume() (UDINT = ~(1<<EORSMI)) 00397 //! tests if resume occurs 00398 #define Is_usb_resume() ((UDINT & (1<<EORSMI)) ? TRUE : FALSE) 00399 00400 //! enables wake-up interrupt 00401 #define Usb_enable_wake_up_interrupt() (UDIEN |= (1<<WAKEUPE)) 00402 //! disables wake-up interrupt 00403 #define Usb_disable_wake_up_interrupt() (UDIEN &= ~(1<<WAKEUPE)) 00404 #define Is_swake_up_interrupt_enabled() ((UDIEN & (1<<WAKEUPE)) ? TRUE : FALSE) 00405 //! acks wake-up 00406 #define Usb_ack_wake_up() (UDINT = ~(1<<WAKEUPI)) 00407 //! tests if wake-up occurs 00408 #define Is_usb_wake_up() ((UDINT & (1<<WAKEUPI)) ? TRUE : FALSE) 00409 00410 //! enables USB reset interrupt 00411 #define Usb_enable_reset_interrupt() (UDIEN |= (1<<EORSTE)) 00412 //! disables USB reset interrupt 00413 #define Usb_disable_reset_interrupt() (UDIEN &= ~(1<<EORSTE)) 00414 #define Is_reset_interrupt_enabled() ((UDIEN & (1<<EORSTE)) ? TRUE : FALSE) 00415 //! acks USB reset 00416 #define Usb_ack_reset() (UDINT = ~(1<<EORSTI)) 00417 //! tests if USB reset occurs 00418 #define Is_usb_reset() ((UDINT & (1<<EORSTI)) ? TRUE : FALSE) 00419 00420 //! enables Start Of Frame Interrupt 00421 #define Usb_enable_sof_interrupt() (UDIEN |= (1<<SOFE)) 00422 //! disables Start Of Frame Interrupt 00423 #define Usb_disable_sof_interrupt() (UDIEN &= ~(1<<SOFE)) 00424 #define Is_sof_interrupt_enabled() ((UDIEN & (1<<SOFE)) ? TRUE : FALSE) 00425 //! acks Start Of Frame 00426 #define Usb_ack_sof() (UDINT = ~(1<<SOFI)) 00427 //! tests if Start Of Frame occurs 00428 #define Is_usb_sof() ((UDINT & (1<<SOFI)) ? TRUE : FALSE) 00429 00430 //! enables suspend state interrupt 00431 #define Usb_enable_suspend_interrupt() (UDIEN |= (1<<SUSPE)) 00432 //! disables suspend state interrupt 00433 #define Usb_disable_suspend_interrupt() (UDIEN &= ~(1<<SUSPE)) 00434 #define Is_suspend_interrupt_enabled() ((UDIEN & (1<<SUSPE)) ? TRUE : FALSE) 00435 //! acks Suspend 00436 #define Usb_ack_suspend() (UDINT = ~(1<<SUSPI)) 00437 //! tests if Suspend state detected 00438 #define Is_usb_suspend() ((UDINT & (1<<SUSPI)) ? TRUE : FALSE) 00439 00440 //! enables USB device address 00441 #define Usb_enable_address() (UDADDR |= (1<<ADDEN)) 00442 //! disables USB device address 00443 #define Usb_disable_address() (UDADDR &= ~(1<<ADDEN)) 00444 //! sets the USB device address 00445 #define Usb_configure_address(addr) (UDADDR = (UDADDR & (1<<ADDEN)) | ((U8)addr & MSK_UADD)) 00446 00447 //! returns the last frame number 00448 #define Usb_frame_number() ((U16)((((U16)UDFNUMH) << 8) | ((U16)UDFNUML))) 00449 //! tests if a crc error occurs in frame number 00450 #define Is_usb_frame_number_crc_error() ((UDMFN & (1<<FNCERR)) ? TRUE : FALSE) 00451 //! @} 00452 00453 00454 00455 //! @ingroup usbdriver 00456 //! @defgroup usb_gen_ep USB endpoint drivers 00457 //! These macros manage the common features of the endpoints. 00458 //! @{ 00459 //! selects the endpoint number to interface with the CPU 00460 #define Usb_select_endpoint(ep) (UENUM = (U8)ep ) 00461 00462 //! get the currently selected endpoint number 00463 #define Usb_get_selected_endpoint() (UENUM ) 00464 00465 //! resets the selected endpoint 00466 #define Usb_reset_endpoint(ep) (UERST = 1 << (U8)ep, UERST = 0) 00467 00468 //! enables the current endpoint 00469 #define Usb_enable_endpoint() (UECONX |= (1<<EPEN)) 00470 //! enables the STALL handshake for the next transaction 00471 #define Usb_enable_stall_handshake() (UECONX |= (1<<STALLRQ)) 00472 //! resets the data toggle sequence 00473 #define Usb_reset_data_toggle() (UECONX |= (1<<RSTDT)) 00474 //! disables the current endpoint 00475 #define Usb_disable_endpoint() (UECONX &= ~(1<<EPEN)) 00476 //! disables the STALL handshake 00477 #define Usb_disable_stall_handshake() (UECONX |= (1<<STALLRQC)) 00478 //! selects endpoint interface on CPU 00479 #define Usb_select_epnum_for_cpu() (UECONX &= ~(1<<EPNUMS)) 00480 //! tests if the current endpoint is enabled 00481 #define Is_usb_endpoint_enabled() ((UECONX & (1<<EPEN)) ? TRUE : FALSE) 00482 //! tests if STALL handshake request is running 00483 #define Is_usb_endpoint_stall_requested() ((UECONX & (1<<STALLRQ)) ? TRUE : FALSE) 00484 00485 //! configures the current endpoint 00486 #define Usb_configure_endpoint_type(type) (UECFG0X = (UECFG0X & ~(MSK_EPTYPE)) | ((U8)type << 6)) 00487 //! configures the current endpoint direction 00488 #define Usb_configure_endpoint_direction(dir) (UECFG0X = (UECFG0X & ~(1<<EPDIR)) | ((U8)dir)) 00489 00490 //! configures the current endpoint size 00491 #define Usb_configure_endpoint_size(size) (UECFG1X = (UECFG1X & ~MSK_EPSIZE) | ((U8)size << 4)) 00492 //! configures the current endpoint number of banks 00493 #define Usb_configure_endpoint_bank(bank) (UECFG1X = (UECFG1X & ~MSK_EPBK) | ((U8)bank << 2)) 00494 //! allocates the current configuration in DPRAM memory 00495 #define Usb_allocate_memory() (UECFG1X |= (1<<ALLOC)) 00496 //! un-allocates the current configuration in DPRAM memory 00497 #define Usb_unallocate_memory() (UECFG1X &= ~(1<<ALLOC)) 00498 00499 //! acks endpoint overflow interrupt 00500 #define Usb_ack_overflow_interrupt() (UESTA0X &= ~(1<<OVERFI)) 00501 //! acks endpoint underflow memory 00502 #define Usb_ack_underflow_interrupt() (UESTA0X &= ~(1<<UNDERFI)) 00503 //! acks Zero Length Packet received 00504 #define Usb_ack_zlp() (UESTA0X &= ~(1<<ZLPSEEN)) 00505 //! returns data toggle 00506 #define Usb_data_toggle() ((UESTA0X&MSK_DTSEQ) >> 2) 00507 //! returns the number of busy banks 00508 #define Usb_nb_busy_bank() (UESTA0X & MSK_NBUSYBK) 00509 //! tests if at least one bank is busy 00510 #define Is_usb_one_bank_busy() ((UESTA0X & MSK_NBUSYBK) == 0 ? FALSE : TRUE) 00511 //! tests if current endpoint is configured 00512 #define Is_endpoint_configured() ((UESTA0X & (1<<CFGOK)) ? TRUE : FALSE) 00513 //! tests if an overflows occurs 00514 #define Is_usb_overflow() ((UESTA0X & (1<<OVERFI)) ? TRUE : FALSE) 00515 //! tests if an underflow occurs 00516 #define Is_usb_underflow() ((UESTA0X & (1<<UNDERFI)) ? TRUE : FALSE) 00517 //! tests if a ZLP has been detected 00518 #define Is_usb_zlp() ((UESTA0X & (1<<ZLPSEEN)) ? TRUE : FALSE) 00519 00520 //! returns the control direction 00521 #define Usb_control_direction() ((UESTA1X & (1<<CTRLDIR)) >> 2) 00522 //! returns the number of the current bank 00523 #define Usb_current_bank() ( UESTA1X & MSK_CURRBK) 00524 00525 //! clears FIFOCON bit 00526 #define Usb_ack_fifocon() (UEINTX &= ~(1<<FIFOCON)) 00527 //! acks NAK IN received 00528 #define Usb_ack_nak_in() (UEINTX &= ~(1<<NAKINI)) 00529 //! acks NAK OUT received 00530 #define Usb_ack_nak_out() (UEINTX &= ~(1<<NAKOUTI)) 00531 //! acks receive SETUP 00532 #define Usb_ack_receive_setup() (UEINTX &= ~(1<<RXSTPI)) 00533 //! tests if NAK IN received 00534 #define Is_usb_receive_nak_in() (UEINTX &(1<<NAKINI)) 00535 //! tests if NAK OUT received 00536 #define Is_usb_receive_nak_out() (UEINTX &(1<<NAKOUTI)) 00537 //! acks reveive OUT 00538 #define Usb_ack_receive_out() (UEINTX &= ~(1<<RXOUTI), Usb_ack_fifocon()) 00539 //! acks STALL sent 00540 #define Usb_ack_stalled() (MSK_STALLEDI= 0) 00541 //! acks IN ready 00542 #define Usb_ack_in_ready() (UEINTX &= ~(1<<TXINI), Usb_ack_fifocon()) 00543 //! Kills last bank 00544 #define Usb_kill_last_in_bank() (UENTTX |= (1<<RXOUTI)) 00545 //! tests if endpoint read allowed 00546 #define Is_usb_read_enabled() (UEINTX&(1<<RWAL)) 00547 //! tests if endpoint write allowed 00548 #define Is_usb_write_enabled() (UEINTX&(1<<RWAL)) 00549 //! tests if read allowed on control endpoint 00550 #define Is_usb_read_control_enabled() (UEINTX&(1<<TXINI)) 00551 //! tests if SETUP received 00552 #define Is_usb_receive_setup() (UEINTX&(1<<RXSTPI)) 00553 //! tests if OUT received 00554 #define Is_usb_receive_out() (UEINTX&(1<<RXOUTI)) 00555 //! tests if IN ready 00556 #define Is_usb_in_ready() (UEINTX&(1<<TXINI)) 00557 //! sends IN 00558 #define Usb_send_in() (UEINTX &= ~(1<<FIFOCON)) 00559 //! sends IN on control endpoint 00560 #define Usb_send_control_in() (UEINTX &= ~(1<<TXINI)) 00561 //! frees OUT bank 00562 #define Usb_free_out_bank() (UEINTX &= ~(1<<FIFOCON)) 00563 //! acks OUT on control endpoint 00564 #define Usb_ack_control_out() (UEINTX &= ~(1<<RXOUTI)) 00565 00566 //! enables flow error interrupt 00567 #define Usb_enable_flow_error_interrupt() (UEIENX |= (1<<FLERRE)) 00568 //! enables NAK IN interrupt 00569 #define Usb_enable_nak_in_interrupt() (UEIENX |= (1<<NAKINE)) 00570 //! enables NAK OUT interrupt 00571 #define Usb_enable_nak_out_interrupt() (UEIENX |= (1<<NAKOUTE)) 00572 //! enables receive SETUP interrupt 00573 #define Usb_enable_receive_setup_interrupt() (UEIENX |= (1<<RXSTPE)) 00574 //! enables receive OUT interrupt 00575 #define Usb_enable_receive_out_interrupt() (UEIENX |= (1<<RXOUTE)) 00576 //! enables STALL sent interrupt 00577 #define Usb_enable_stalled_interrupt() (UEIENX |= (1<<STALLEDE)) 00578 //! enables IN ready interrupt 00579 #define Usb_enable_in_ready_interrupt() (UEIENX |= (1<<TXINE)) 00580 //! disables flow error interrupt 00581 #define Usb_disable_flow_error_interrupt() (UEIENX &= ~(1<<FLERRE)) 00582 //! disables NAK IN interrupt 00583 #define Usb_disable_nak_in_interrupt() (UEIENX &= ~(1<<NAKINE)) 00584 //! disables NAK OUT interrupt 00585 #define Usb_disable_nak_out_interrupt() (UEIENX &= ~(1<<NAKOUTE)) 00586 //! disables receive SETUP interrupt 00587 #define Usb_disable_receive_setup_interrupt() (UEIENX &= ~(1<<RXSTPE)) 00588 //! disables receive OUT interrupt 00589 #define Usb_disable_receive_out_interrupt() (UEIENX &= ~(1<<RXOUTE)) 00590 //! disables STALL sent interrupt 00591 #define Usb_disable_stalled_interrupt() (UEIENX &= ~(1<<STALLEDE)) 00592 //! disables IN ready interrupt 00593 #define Usb_disable_in_ready_interrupt() (UEIENX &= ~(1<<TXIN)) 00594 00595 //! returns FIFO byte for current endpoint 00596 #define Usb_read_byte() (UEDATX) 00597 //! writes byte in FIFO for current endpoint 00598 #define Usb_write_byte(byte) (UEDATX = (U8)byte) 00599 00600 //! returns number of bytes in FIFO current endpoint (16 bits) 00601 #define Usb_byte_counter() ((((U16)UEBCHX) << 8) | (UEBCLX)) 00602 //! returns number of bytes in FIFO current endpoint (8 bits) 00603 #define Usb_byte_counter_8() ((U8)UEBCLX) 00604 00605 //! tests the general endpoint interrupt flags 00606 #define Usb_interrupt_flags() (UEINT) 00607 //! tests the general endpoint interrupt flags 00608 #define Is_usb_endpoint_event() (Usb_interrupt_flags() != 0x00) 00609 //! @} 00610 00611 00612 //! @ingroup usbdriver 00613 //! @defgroup host_management USB host controller drivers 00614 //! These macros manage the USB Host controller. 00615 //! @{ 00616 //! allocates the current configuration in DPRAM memory 00617 #define Host_allocate_memory() (UPCFG1X |= (1<<ALLOC)) 00618 //! un-allocates the current configuration in DPRAM memory 00619 #define Host_unallocate_memory() (UPCFG1X &= ~(1<<ALLOC)) 00620 00621 //! enables USB Host function 00622 #define Host_enable() (USBCON |= (1<<HOST)) 00623 00624 #ifndef SOFEN 00625 #define SOFEN 0 //For AVRGCC, SOFEN bit missing in default sfr file 00626 #endif 00627 //! enables SOF generation 00628 #define Host_enable_sof() (UHCON |= (1<<SOFEN)) 00629 //! disables SOF generation 00630 #define Host_disable_sof() (UHCON &= ~(1<<SOFEN)) 00631 //! sends a USB Reset to the device 00632 #define Host_send_reset() (UHCON |= (1<<RESET)) 00633 //! tests if USB Reset running 00634 #define Host_is_reset() ((UHCON & (1<<RESET)) ? TRUE : FALSE) 00635 //! sends a USB Resume to the device 00636 #define Host_send_resume() (UHCON |= (1<<RESUME)) 00637 //! tests if USB Resume running 00638 #define Host_is_resume() ((UHCON & (1<<RESUME)) ? TRUE : FALSE) 00639 00640 //! enables host start of frame interrupt 00641 #define Host_enable_sof_interrupt() (UHIEN |= (1<<HSOFE)) 00642 //! enables host start of frame interrupt 00643 #define Host_disable_sof_interrupt() (UHIEN &= ~(1<<HSOFE)) 00644 #define Is_host_sof_interrupt_enabled() ((UHIEN & (1<<HSOFE)) ? TRUE : FALSE) 00645 //! tests if SOF detected 00646 #define Host_is_sof() ((UHINT & (1<<HSOFI)) ? TRUE : FALSE) 00647 #define Is_host_sof() ((UHINT & (1<<HSOFI)) ? TRUE : FALSE) 00648 #define Host_ack_sof() (UHINT &= ~(1<<HSOFI)) 00649 00650 //! enables host wake up interrupt detection 00651 #define Host_enable_hwup_interrupt() (UHIEN |= (1<<HWUPE)) 00652 //! disables host wake up interrupt detection 00653 #define Host_disable_hwup_interrupt() (UHIEN &= ~(1<<HWUPE)) 00654 #define Is_host_hwup_interrupt_enabled() ((UHIEN & (1<<HWUPE)) ? TRUE : FALSE) 00655 //! tests if host wake up detected 00656 #define Host_is_hwup() ((UHINT & (1<<HWUPI)) ? TRUE : FALSE) 00657 //! Ack host wake up detection 00658 #define Is_host_hwup() ((UHINT & (1<<HWUPI)) ? TRUE : FALSE) 00659 #define Host_ack_hwup() (UHINT &= ~(1<<HWUPI)) 00660 00661 //! enables host down stream rsm sent interrupt detection 00662 #define Host_enable_down_stream_resume_interrupt() (UHIEN |= (1<<RSMEDE)) 00663 //! disables host down stream rsm sent interrupt detection 00664 #define Host_disable_down_stream_resume_interrupt() (UHIEN &= ~(1<<RSMEDE)) 00665 #define Is_host_down_stream_resume_interrupt_enabled() ((UHIEN & (1<<RSMEDE)) ? TRUE : FALSE) 00666 //! Ack host down stream resume sent 00667 #define Is_host_down_stream_resume() ((UHINT & (1<<RSMEDI)) ? TRUE : FALSE) 00668 #define Host_ack_down_stream_resume() (UHINT &= ~(1<<RSMEDI)) 00669 00670 //! enables host remote wake up interrupt detection 00671 #define Host_enable_remote_wakeup_interrupt() (UHIEN |= (1<<RXRSME)) 00672 //! disables host remote wake up interrupt detection 00673 #define Host_disable_remote_wakeup_interrupt() (UHIEN &= ~(1<<RXRSME)) 00674 #define Is_host_remote_wakeup_interrupt_enabled() ((UHIEN & (1<<RXRSME)) ? TRUE : FALSE) 00675 //! tests if host wake up detected 00676 #define Host_is_remote_wakeup() ((UHINT & (1<<RXRSMI)) ? TRUE : FALSE) 00677 //! Ack host wake up detection 00678 #define Is_host_remote_wakeup() ((UHINT & (1<<RXRSMI)) ? TRUE : FALSE) 00679 #define Host_ack_remote_wakeup() (UHINT &= ~(1<<RXRSMI)) 00680 00681 //! enables host device connection interrupt 00682 #define Host_enable_device_connection_interrupt() (UHIEN |= (1<<DCONNE)) 00683 //! disables USB device connection interrupt 00684 #define Host_disable_device_connection_interrupt() (UHIEN &= ~(1<<DCONNE)) 00685 #define Is_host_device_connection_interrupt_enabled() ((UHIEN & (1<<DCONNE)) ? TRUE : FALSE) 00686 //! tests if a USB device has been detected 00687 #define Is_device_connection() (UHINT & (1<<DCONNI)) 00688 //! acks device connection 00689 #define Host_ack_device_connection() (UHINT = ~(1<<DCONNI)) 00690 00691 //! enables host device disconnection interrupt 00692 #define Host_enable_device_disconnection_interrupt() (UHIEN |= (1<<DDISCE)) 00693 //! disables USB device connection interrupt 00694 #define Host_disable_device_disconnection_interrupt() (UHIEN &= ~(1<<DDISCE)) 00695 #define Is_host_device_disconnection_interrupt_enabled() ((UHIEN & (1<<DDISCE)) ? TRUE : FALSE) 00696 //! tests if a USB device has been removed 00697 #define Is_device_disconnection() (UHINT & (1<<DDISCI) ? TRUE : FALSE) 00698 //! acks device disconnection 00699 #define Host_ack_device_disconnection() (UHINT = ~(1<<DDISCI)) 00700 00701 //! enables host USB reset interrupt 00702 #define Host_enable_reset_interrupt() (UHIEN |= (1<<RSTE)) 00703 //! disables host USB reset interrupt 00704 #define Host_disable_reset_interrupt() (UHIEN &= ~(1<<RSTE)) 00705 #define Is_host_reset_interrupt_enabled() ((UHIEN & (1<<RSTE)) ? TRUE : FALSE) 00706 //! acks host USB reset sent 00707 #define Host_ack_reset() (UHINT = ~(1<<RSTI)) 00708 //! tests if USB reset has been sent 00709 #define Is_host_reset() Host_is_reset() 00710 00711 00712 //! switches on VBus 00713 #define Host_vbus_request() (OTGCON |= (1<<VBUSREQ)) 00714 //! switches off VBus 00715 #define Host_clear_vbus_request() (OTGCON |= (1<<VBUSRQC)) 00716 //! configures the address to use for the device 00717 #define Host_configure_address(addr) (UHADDR = addr & MSK_HADDR) 00718 00719 //! Get connected device speed, returns TRUE when in full speed mode 00720 #define Is_host_full_speed() ((USBSTA & (1<<SPEED)) ? TRUE : FALSE) 00721 //! @} 00722 00723 00724 //! @ingroup usbdriver 00725 //! @defgroup general_pipe USB pipe drivers 00726 //! These macros manage the common features of the pipes. 00727 //! @{ 00728 //! selects pipe for CPU interface 00729 #define Host_select_pipe(p) (UPNUM = (U8)p) 00730 00731 //! get the currently selected pipe number 00732 #define Host_get_selected_pipe() (UPNUM ) 00733 00734 //! enables pipe 00735 #define Host_enable_pipe() (UPCONX |= (1<<PEN)) 00736 //! disables pipe 00737 #define Host_disable_pipe() (UPCONX &= ~(1<<PEN)) 00738 00739 //! sets SETUP token 00740 #define Host_set_token_setup() (UPCFG0X = UPCFG0X & ~MSK_TOKEN_SETUP) 00741 //! sets IN token 00742 #define Host_set_token_in() (UPCFG0X = (UPCFG0X & ~MSK_TOKEN_SETUP) | MSK_TOKEN_IN) 00743 //! sets OUT token 00744 #define Host_set_token_out() (UPCFG0X = (UPCFG0X & ~MSK_TOKEN_SETUP) | MSK_TOKEN_OUT) 00745 00746 //! returns the number of the endpoint associated to the current pipe 00747 #define Host_get_endpoint_number() (UPCFG0X & (MSK_PEPNUM)) 00748 00749 //! returns pipe interrupt register 00750 #define Host_get_pipe_interrupt() (UPINT) 00751 00752 //! sets the interrupt frequency 00753 #define Host_set_interrupt_frequency(frq) (UPCFG2X = (U8)frq) 00754 00755 //! tests if current pipe is configured 00756 #define Is_pipe_configured() (UPSTAX & (1<<CFGOK)) 00757 //! tests if at least one bank is busy 00758 #define Is_host_one_bank_busy() ((UPSTAX & (1<<MSK_NBUSYBK)) != 0) 00759 //! returns the number of busy banks 00760 #define Host_number_of_busy_bank() (UPSTAX & (1<<MSK_NBUSYBK)) 00761 00762 //! resets the pipe 00763 #define Host_reset_pipe(p) (UPRST = 1<<p , UPRST = 0) 00764 00765 //! writes a byte into the pipe FIFO 00766 #define Host_write_byte(dat) (UPDATX = dat) 00767 //! reads a byte from the pipe FIFO 00768 #define Host_read_byte() (UPDATX) 00769 00770 //! freezes the pipe 00771 #define Host_freeze_pipe() (UPCONX |= (1<<PFREEZE)) 00772 //! un-freezees the pipe 00773 #define Host_unfreeze_pipe() (UPCONX &= ~(1<<PFREEZE)) 00774 //! tests if the current pipe is frozen 00775 #define Is_host_pipe_freeze() (UPCONX & (1<<PFREEZE)) 00776 00777 //! resets data toggle 00778 #define Host_reset_pipe_data_toggle() (UPCONX |= (1<<RSTDT) ) 00779 00780 //! tests if SETUP has been sent 00781 #define Is_host_setup_sent() ((UPINTX & (1<<TXSTPI)) ? TRUE : FALSE) 00782 //! tests if control IN has been received 00783 #define Is_host_control_in_received() ((UPINTX & (1<<RXINI)) ? TRUE : FALSE) 00784 //! tests if control OUT has been sent 00785 #define Is_host_control_out_sent() ((UPINTX & (1<<TXOUTI)) ? TRUE : FALSE) 00786 //! tests if a STALL has been received 00787 #define Is_host_stall() ((UPINTX & (1<<RXSTALLI)) ? TRUE : FALSE) 00788 //! tests if an error occurs on current pipe 00789 #define Is_host_pipe_error() ((UPINTX & (1<<PERRI)) ? TRUE : FALSE) 00790 //! sends a setup 00791 #define Host_send_setup() (UPINTX &= ~(1<<FIFOCON)) 00792 //! sends a control IN 00793 #define Host_send_control_in() (UPINTX &= ~(1<<FIFOCON)) 00794 //! sends a control OUT 00795 #define Host_send_control_out() (UPINTX &= ~(1<<FIFOCON)) 00796 //! acks control OUT 00797 #define Host_ack_control_out() (UPINTX &= ~(1<<TXOUTI)) 00798 //! acks control IN 00799 #define Host_ack_control_in() (UPINTX &= ~(1<<RXINI)) 00800 //! acks setup 00801 #define Host_ack_setup() (UPINTX &= ~(1<<TXSTPI)) 00802 //! acks STALL reception 00803 #define Host_ack_stall() (UPINTX &= ~(1<<RXSTALLI)) 00804 00805 //! sends a OUT 00806 #define Host_send_out() (UPINTX &= ~(1<<FIFOCON)) 00807 //! tests if OUT has been sent 00808 #define Is_host_out_sent() ((UPINTX & (1<<TXOUTI)) ? TRUE : FALSE) 00809 //! acks OUT sent 00810 #define Host_ack_out_sent() (UPINTX &= ~(1<<TXOUTI)) 00811 //! tests if IN received 00812 #define Is_host_in_received() ((UPINTX & (1<<RXINI)) ? TRUE : FALSE) 00813 //! acks IN reception 00814 #define Host_ack_in_received() (UPINTX &= ~(1<<RXINI)) 00815 //! sends a IN 00816 #define Host_send_in() (UPINTX &= ~(1<<FIFOCON)) 00817 //! tests if nak handshake has been received 00818 #define Is_host_nak_received() ((UPINTX & (1<<NAKEDI)) ? TRUE : FALSE) 00819 //! acks NAk received sent 00820 #define Host_ack_nak_received() (UPINTX &= ~(1<<NAKEDI)) 00821 00822 00823 00824 //! tests if endpoint read allowed 00825 #define Is_host_read_enabled() (UPINTX&(1<<RWAL)) 00826 //! tests if endpoint read allowed 00827 #define Is_host_write_enabled() (UPINTX&(1<<RWAL)) 00828 00829 //! sets IN in standard mode 00830 #define Host_standard_in_mode() (UPCONX &= ~(1<<INMODE)) 00831 //! sets IN in continuous mode 00832 #define Host_continuous_in_mode() (UPCONX |= (1<<INMODE)) 00833 00834 //! sets number of IN requests to perform before freeze 00835 #define Host_in_request_number(in_num) (UPINRQX = (U8)in_num) 00836 //! returns number of remaining IN requests 00837 #define Host_get_in_request_number() (UPINRQX) 00838 00839 //! returns number of bytes (8 bits) 00840 #define Host_data_length_U8() (UPBCLX) 00841 //! returns number of bytes (16 bits) 00842 #define Host_data_length_U16() ((((U16)UPBCHX)<<8) | UPBCLX) 00843 //! for device compatibility 00844 #define Host_byte_counter() Host_data_length_U16() 00845 //! for device compatibility 00846 #define Host_byte_counter_8() Host_data_length_U8() 00847 00848 //! returns the size of the current pipe 00849 #define Host_get_pipe_length() ((U16)0x08 << ((UPCFG1X & MSK_PSIZE)>>4)) 00850 00851 //! returns the type of the current pipe 00852 #define Host_get_pipe_type() (UPCFG0X>>6) 00853 00854 //! tests if error occurs on pipe 00855 #define Host_error_status() (UPERRX & MSK_ERROR) 00856 //! acks all pipe error 00857 #define Host_ack_all_errors() (UPERRX = 0x00) 00858 00859 //! Enable pipe end transmission interrupt 00860 #define Host_enable_transmit_interrupt() (UPIENX |= (1<<TXOUTE)) 00861 //! Disable pipe end transmission interrupt 00862 #define Host_disable_transmit_interrupt() (UPIENX &= ~(1<<TXOUTE)) 00863 00864 //! Enable pipe reception interrupt 00865 #define Host_enable_receive_interrupt() (UPIENX |= (1<<RXINE)) 00866 //! Disable pipe recption interrupt 00867 #define Host_disable_receive_interrupt() (UPIENX &= ~(1<<RXINE)) 00868 00869 //! Enable pipe stall interrupt 00870 #define Host_enable_stall_interrupt() (UPIENX |= (1<<RXSTALLE)) 00871 //! Disable pipe stall interrupt 00872 #define Host_disable_stall_interrupt() (UPIENX &= ~(1<<RXSTALLE)) 00873 00874 //! Enable pipe error interrupt 00875 #define Host_enable_error_interrupt() (UPIENX |= (1<<PERRE)) 00876 //! Disable pipe error interrupt 00877 #define Host_disable_error_interrupt() (UPIENX &= ~(1<<PERRE)) 00878 00879 //! Enable pipe NAK interrupt 00880 #define Host_enable_nak_interrupt() (UPIENX |= (1<<NAKEDE)) 00881 //! Disable pipe NAK interrupt 00882 #define Host_disable_nak_interrupt() (UPIENX &= ~(1<<NAKEDE)) 00883 00884 #define Get_pipe_token(x) ((x & (0x80)) ? TOKEN_IN : TOKEN_OUT) 00885 00886 //! @} 00887 00888 //! wSWAP 00889 //! This macro swaps the U8 order in words. 00890 //! 00891 //! @param x (U16) the 16 bit word to swap 00892 //! 00893 //! @return (U16) the 16 bit word x with the 2 bytes swaped 00894 00895 #define wSWAP(x) \ 00896 ( (((x)>>8)&0x00FF) \ 00897 | (((x)<<8)&0xFF00) \ 00898 ) 00899 00900 00901 //! Usb_write_word_enum_struc 00902 //! This macro help to fill the U16 fill in USB enumeration struct. 00903 //! Depending on the CPU architecture, the macro swap or not the nibbles 00904 //! 00905 //! @param x (U16) the 16 bit word to be written 00906 //! 00907 //! @return (U16) the 16 bit word written 00908 #if !defined(BIG_ENDIAN) && !defined(LITTLE_ENDIAN) 00909 #error YOU MUST Define the Endian Type of target: LITTLE_ENDIAN or BIG_ENDIAN 00910 #endif 00911 #ifdef LITTLE_ENDIAN 00912 #define Usb_write_word_enum_struc(x) (x) 00913 #else //BIG_ENDIAN 00914 #define Usb_write_word_enum_struc(x) (wSWAP(x)) 00915 #endif 00916 00917 00918 //_____ D E C L A R A T I O N ______________________________________________ 00919 00920 U8 usb_config_ep (U8, U8); 00921 U8 usb_select_enpoint_interrupt (void); 00922 U8 usb_send_packet (U8 , U8*, U8); 00923 U8 usb_read_packet (U8 , U8*, U8); 00924 void usb_halt_endpoint (U8); 00925 U8 usb_init_device (void); 00926 00927 U8 host_config_pipe (U8, U8); 00928 U8 host_determine_pipe_size (U16); 00929 void host_disable_all_pipe (void); 00930 U8 usb_get_nb_pipe_interrupt (void); 00931 00932 U8 usb_endpoint_wait_for_read_control_enabled(); 00933 U8 usb_endpoint_wait_for_write_enabled(); 00934 U8 usb_endpoint_wait_for_receive_out(); 00935 U8 usb_endpoint_wait_for_IN_ready(); 00936 00937 #define usb_endpoint_wait_for_read_enabled usb_endpoint_wait_for_write_enabled 00938 00939 #endif // _USB_DRV_H_ 00940 00941 /** @} */
1.7.3