Contiki 2.6

dma.c

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00001 /**
00002  * \file
00003  *         Driver for the cc2430 DMA controller. Can be assigned to any bank
00004  *
00005  * \author
00006  *         Original: Martti Huttunen <martti@sensinode.com>
00007  *         Port: Zach Shelby <zach@sensinode.com>
00008  *         Further Modifications:
00009  *               George Oikonomou <oikonomou@users.sourceforge.net>
00010  *
00011  */
00012 
00013 #include "contiki.h"
00014 #include "dev/dma.h"
00015 #include "cc253x.h"
00016 
00017 #if DMA_ON
00018 struct dma_config dma_conf[DMA_CHANNEL_COUNT]; /* DMA Descriptors */
00019 struct process * dma_callback[DMA_CHANNEL_COUNT];
00020 /*---------------------------------------------------------------------------*/
00021 void
00022 dma_init(void)
00023 {
00024   uint16_t tmp_ptr;
00025 
00026   memset(dma_conf, 0, 4 * sizeof(dma_config_t));
00027 
00028   for(tmp_ptr = 0; tmp_ptr < DMA_CHANNEL_COUNT; tmp_ptr++) {
00029     dma_callback[tmp_ptr] = 0;
00030   }
00031 
00032   /* The address of the descriptor for Channel 0 is configured separately */
00033   tmp_ptr = (uint16_t) &(dma_conf[0]);
00034   DMA0CFGH = tmp_ptr >> 8;
00035   DMA0CFGL = tmp_ptr;
00036 
00037   /*
00038    * Descriptors for Channels 1-4 must be consecutive in RAM.
00039    * We write the address of the 1st one to the register and the rest are
00040    * derived by the SoC
00041    */
00042 #if (DMA_CHANNEL_COUNT > 1)
00043   tmp_ptr = (uint16_t) &(dma_conf[1]);
00044   DMA1CFGH = tmp_ptr >> 8;
00045   DMA1CFGL = tmp_ptr;
00046 #endif
00047 
00048   IEN1_DMAIE = 1;       /* Enable DMA interrupts */
00049 }
00050 /*---------------------------------------------------------------------------*/
00051 /*
00052  * Associate process p with DMA channel c. When a transfer on that channel
00053  * completes, the ISR will poll this process.
00054  */
00055 void
00056 dma_associate_process(struct process * p, uint8_t c)
00057 {
00058   if((!c) || (c >= DMA_CHANNEL_COUNT)) {
00059     return;
00060   }
00061 
00062   if(p) {
00063     dma_conf[c].inc_prio |= 8; /* Enable interrupt generation */
00064     IEN1_DMAIE = 1; /* Make sure DMA interrupts are acknowledged */
00065   }
00066   dma_callback[c] = p;
00067 }
00068 /*---------------------------------------------------------------------------*/
00069 #endif