Contiki 2.6

port.h

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00001 /*
00002  * Copyright (c) 2011, George Oikonomou - <oikonomou@users.sourceforge.net>
00003  * All rights reserved.
00004  *
00005  * Redistribution and use in source and binary forms, with or without
00006  * modification, are permitted provided that the following conditions
00007  * are met:
00008  * 1. Redistributions of source code must retain the above copyright
00009  *    notice, this list of conditions and the following disclaimer.
00010  * 2. Redistributions in binary form must reproduce the above copyright
00011  *    notice, this list of conditions and the following disclaimer in the
00012  *    documentation and/or other materials provided with the distribution.
00013  * 3. Neither the name of the Institute nor the names of its contributors
00014  *    may be used to endorse or promote products derived from this software
00015  *    without specific prior written permission.
00016  *
00017  * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
00018  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
00019  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
00020  * ARE DISCLAIMED.  IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
00021  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
00022  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
00023  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
00024  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
00025  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
00026  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
00027  * SUCH DAMAGE.
00028  *
00029  * This file is part of the Contiki operating system.
00030  */
00031 
00032 /**
00033  * \file
00034  *
00035  * \author
00036  *         George Oikonomou - <oikonomou@users.sourceforge.net>
00037  */
00038 
00039 
00040 #ifndef PORT_H_
00041 #define PORT_H_
00042 
00043 #include "cc253x.h"
00044 #include "sfr-bits.h"
00045 /*---------------------------------------------------------------------------*/
00046 /* Use these to configure your platform's hardware */
00047 #define PORT_FUNC_GPIO(port,pin)     PORT_FUNC_GPIO_X(port,pin)
00048 #define PORT_FUNC_PER(port,pin)      PORT_FUNC_PER_X(port,pin)
00049 #define PORT0_ANALOG_IO(pin)         PORT0_ANALOG_IO_X(pin)
00050 #define PORT0_DIGITAL_IO(pin)        PORT0_DIGITAL_IO_X(pin)
00051 #define PORT_SET(port,pin)           PORT_SET_X(port,pin)
00052 #define PORT_CLEAR(port,pin)         PORT_CLEAR_X(port,pin) PORT_CLEAR_X(port,pin)
00053 #define PORT_TOGGLE(port,pin)        PORT_TOGGLE_X(port,pin) PORT_TOGGLE_X(port,pin)
00054 #define PORT_READ(port,pin)          PORT_READ_X(port,pin)
00055 #define PORT_WRITE(port,pin,v)       PORT_WRITE_X(port,pin,v)
00056 #define PORT_DIR_OUTPUT(port,pin)    PORT_DIR_OUTPUT_X(port,pin)
00057 #define PORT_DIR_INPUT(port,pin)     PORT_DIR_INPUT_X(port,pin)
00058 #define PORT_IRQ_ENABLE(port,pin)    PORT_IRQ_ENABLE_X(port,pin)
00059 #define PORT_IRQ_DISABLE(port,pin)   PORT_IRQ_DISABLE_X(port,pin)
00060 #define PORT_IRQ_ENABLED(port,pin)   PORT_IRQ_ENABLED_X(port,pin)
00061 #define PORT_IRQ_CHECK(port,pin)     PORT_IRQ_CHECK_X(port,pin)
00062 #define PORT_IRQ_EDGE_FALL(port,pin) PORT_IRQ_EDGE_FALL_X(port,pin)
00063 #define PORT_IRQ_EDGE_RISE(port,pin) PORT_IRQ_EDGE_RISE_X(port,pin)
00064 #define PORT_IRQ_FLAG_OFF(port,pin)  PORT_IRQ_FLAG_OFF_X(port,pin)
00065 /*---------------------------------------------------------------------------*/
00066 /* Second Round of Macro Substitutions. Normally, you can stop reading here */
00067 /*---------------------------------------------------------------------------*/
00068 #define PORT_FUNC_GPIO_X(port,pin)     do { P##port##SEL &= ~(1 << pin); } while(0)
00069 #define PORT_FUNC_PER_X(port,pin)      do { P##port##SEL |= 1 << pin; } while(0)
00070 #define PORT0_ANALOG_IO_X(port,pin)    do { APCFG |= 1 << pin; } while(0)
00071 #define PORT0_DIGITAL_IO_X(port,pin)   do { APCFG &= ~(1 << pin); } while(0)
00072 #define PORT_SET_X(port,pin)           do { P##port##_##pin = 1; } while(0)
00073 #define PORT_CLEAR_X(port,pin)         do { P##port##_##pin = 0; } while(0)
00074 #define PORT_TOGGLE_X(port,pin)        do { P##port##_##pin ^= 1; } while(0)
00075 #define PORT_READ_X(port,pin)          (P##port##_##pin)
00076 #define PORT_WRITE_X(port,pin,v)       do { P##port##_##pin = v;} while(0)
00077 #define PORT_DIR_OUTPUT_X(port,pin)    do { P##port##DIR |= 1 << pin; } while(0)
00078 #define PORT_DIR_INPUT_X(port,pin)     do { P##port##DIR &= ~(1 << pin); } while(0)
00079 #define PORT_IRQ_ENABLE_X(port,pin)    do { \
00080   P##port##IEN |= 1 << pin; \
00081   PORT##port##_IRQ_ENABLE(); \
00082 } while(0)
00083 #define PORT_IRQ_DISABLE_X(port,pin)   do { \
00084   P##port##IEN &= ~(1 << pin); \
00085   PORT##port##_IRQ_DISABLE(); \
00086 } while(0)
00087 #define PORT_IRQ_ENABLED_X(port,pin)   (P##port##IEN & (1 << pin))
00088 #define PORT_IRQ_CHECK_X(port,pin)     (P##port##IFG & (1 << pin))
00089 #define PORT_IRQ_EDGE_FALL_X(port,pin) PORT##port##_IRQ_EDGE_FALL(pin)
00090 #define PORT_IRQ_EDGE_RISE_X(port,pin) PORT##port##_IRQ_EDGE_RISE(pin)
00091 #define PORT_IRQ_FLAG_OFF_X(port,pin)  do { \
00092   P##port##IFG &= ~(1 << pin); \
00093   P##port##IF = 0; \
00094 } while(0)
00095 /*---------------------------------------------------------------------------*/
00096 /* To handle SFR diversities
00097  * - P0IE is in IEN1, which is bit-addressable,
00098  *   P1IE and P2IE are in IEN2, which is not bit-addressable
00099  * - Edge detection (rising / falling) config is uniform for all pins in
00100  *   P0 and P2. For P1, low and high nibble bits are configured separately
00101  * - Pullup/Pulldown/Tristate is quite different for each port
00102  *
00103  * You won't have to invoke these macros directly
00104  */
00105 #define PORT0_IRQ_ENABLE()  do { P0IE = 1; } while(0)
00106 #define PORT0_IRQ_DISABLE() do { P0IE = 0; } while(0)
00107 #define PORT1_IRQ_ENABLE()  PORT_IRQ_EN_X(1)
00108 #define PORT1_IRQ_DISABLE() PORT_IRQ_DIS_X(1)
00109 #define PORT2_IRQ_ENABLE()  PORT_IRQ_EN_X(2)
00110 #define PORT2_IRQ_DISABLE() PORT_IRQ_DIS_X(2)
00111 
00112 #define PORT_IRQ_EN_X(port)  do { IEN2 |= IEN2_P##port##IE; } while(0)
00113 #define PORT_IRQ_DIS_X(port) do { IEN2 &= ~IEN2_P##port##IE; } while(0)
00114 /*---------------------------------------------------------------------------*/
00115 #define PORT0_IRQ_EDGE_FALL(pin) PORT_IRQ_EDGE_F_X(0)
00116 #define PORT0_IRQ_EDGE_RISE(pin) PORT_IRQ_EDGE_R_X(0)
00117 #define PORT1_IRQ_EDGE_FALL(pin) PORT1_##pin##_IRQ_EDGE_F_X()
00118 #define PORT1_IRQ_EDGE_RISE(pin) PORT1_##pin##_IRQ_EDGE_R_X()
00119 #define PORT2_IRQ_EDGE_FALL(pin) PORT_IRQ_EDGE_F_X(2)
00120 #define PORT2_IRQ_EDGE_RISE(pin) PORT_IRQ_EDGE_R_X(2)
00121 
00122 /* Ports 0 & 2 */
00123 #define PORT_IRQ_EDGE_F_X(port) do { PICTL |= PICTL_P##port##ICON; } while(0)
00124 #define PORT_IRQ_EDGE_R_X(port) do { PICTL &= ~PICTL_P##port##ICON; } while(0)
00125 /* Port 1 - High Nibble */
00126 #define PORT1_7_IRQ_EDGE_F_X()  do { PICTL |= PICTL_P1ICONH; } while(0)
00127 #define PORT1_7_IRQ_EDGE_R_X()  do { PICTL &= ~PICTL_P1ICONH; } while(0)
00128 #define PORT1_6_IRQ_EDGE_F_X()  do { PICTL |= PICTL_P1ICONH; } while(0)
00129 #define PORT1_6_IRQ_EDGE_R_X()  do { PICTL &= ~PICTL_P1ICONH; } while(0)
00130 #define PORT1_5_IRQ_EDGE_F_X()  do { PICTL |= PICTL_P1ICONH; } while(0)
00131 #define PORT1_5_IRQ_EDGE_R_X()  do { PICTL &= ~PICTL_P1ICONH; } while(0)
00132 #define PORT1_4_IRQ_EDGE_F_X()  do { PICTL |= PICTL_P1ICONH; } while(0)
00133 #define PORT1_4_IRQ_EDGE_R_X()  do { PICTL &= ~PICTL_P1ICONH; } while(0)
00134 /* Port 1 - Low Nibble */
00135 #define PORT1_3_IRQ_EDGE_F_X()  do { PICTL |= PICTL_P1ICONL; } while(0)
00136 #define PORT1_3_IRQ_EDGE_R_X()  do { PICTL &= ~PICTL_P1ICONL; } while(0)
00137 #define PORT1_2_IRQ_EDGE_F_X()  do { PICTL |= PICTL_P1ICONL; } while(0)
00138 #define PORT1_2_IRQ_EDGE_R_X()  do { PICTL &= ~PICTL_P1ICONL; } while(0)
00139 #define PORT1_1_IRQ_EDGE_F_X()  do { PICTL |= PICTL_P1ICONL; } while(0)
00140 #define PORT1_1_IRQ_EDGE_R_X()  do { PICTL &= ~PICTL_P1ICONL; } while(0)
00141 #define PORT1_0_IRQ_EDGE_F_X()  do { PICTL |= PICTL_P1ICONL; } while(0)
00142 #define PORT1_0_IRQ_EDGE_R_X()  do { PICTL &= ~PICTL_P1ICONL; } while(0)
00143 /*---------------------------------------------------------------------------*/
00144 
00145 #endif /* __PORT_H__ */