Contiki 2.6

m25p16.h

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00001 /*
00002  * Copyright (c) 2010, Loughborough University - Computer Science
00003  * All rights reserved.
00004  *
00005  * Redistribution and use in source and binary forms, with or without
00006  * modification, are permitted provided that the following conditions
00007  * are met:
00008  * 1. Redistributions of source code must retain the above copyright
00009  *    notice, this list of conditions and the following disclaimer.
00010  * 2. Redistributions in binary form must reproduce the above copyright
00011  *    notice, this list of conditions and the following disclaimer in the
00012  *    documentation and/or other materials provided with the distribution.
00013  * 3. Neither the name of the Institute nor the names of its contributors
00014  *    may be used to endorse or promote products derived from this software
00015  *    without specific prior written permission.
00016  *
00017  * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
00018  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
00019  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
00020  * ARE DISCLAIMED.  IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
00021  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
00022  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
00023  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
00024  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
00025  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
00026  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
00027  * SUCH DAMAGE.
00028  *
00029  * This file is part of the Contiki operating system.
00030  */
00031 
00032 /**
00033  * \file
00034  *         Header file for the control of the M25P16 on sensinode N740s.
00035  *
00036  * \author
00037  *         George Oikonomou - <oikonomou@users.sourceforge.net>
00038  */
00039 
00040 #ifndef M25P16_H_
00041 #define M25P16_H_
00042 
00043 /* Instruction Set */
00044 #define M25P16_I_WREN      0x06 /* Write Enable */
00045 #define M25P16_I_WRDI      0x04 /* Write Disable */
00046 #define M25P16_I_RDID      0x9F /* Read Identification */
00047 #define M25P16_I_RDSR      0x05 /* Read Status Register */
00048 #define M25P16_I_WRSR      0x01 /* Write Status Register */
00049 #define M25P16_I_READ      0x03 /* Read Data Bytes */
00050 #define M25P16_I_FAST_READ 0x0B /* Read Data Bytes at Higher Speed */
00051 #define M25P16_I_PP        0x02 /* Page Program */
00052 #define M25P16_I_SE        0xD8 /* Sector Erase */
00053 #define M25P16_I_BE        0xC7 /* Bulk Erase */
00054 #define M25P16_I_DP        0xB9 /* Deep Power-down */
00055 #define M25P16_I_RES       0xAB /* Release from Deep Power-down */
00056 
00057 /* Dummy Byte - Used in FAST_READ and RES */
00058 #define M25P16_DUMMY_BYTE  0x00
00059 
00060 /* Pins */
00061 #define M25P16_PIN_CLOCK   P1_5
00062 #define M25P16_PIN_SER_I   P1_6
00063 #define M25P16_PIN_SER_O   P1_7
00064 
00065 /* Status Register Bits */
00066 #define M25P16_SR_SRWD     0x80 /* Status Register Write Disable */
00067 #define M25P16_SR_BP2      0x10 /* Block Protect 2 */
00068 #define M25P16_SR_BP1      0x08 /* Block Protect 1 */
00069 #define M25P16_SR_BP0      0x04 /* Block Protect 0 */
00070 #define M25P16_SR_BP       0x1C /* All Block Protect Bits */
00071 #define M25P16_SR_WEL      0x02 /* Write Enable Latch */
00072 #define M25P16_SR_WIP      0x01 /* Write in Progress */
00073 
00074 /* Do we use READ or FAST_READ to read? Fast by default */
00075 #ifdef M25P16_CONF_READ_FAST
00076 #define M25P16_READ_FAST M25P16_CONF_READ_FAST
00077 #else
00078 #define M25P16_READ_FAST 1
00079 #endif
00080 /*---------------------------------------------------------------------------*/
00081 /** \brief Device Identifier
00082  *
00083  * Holds the value of the device identifier, returned by the RDID instruction.
00084  *
00085  * After a correct RDID, this structure should hold the following values:
00086  * man_id = 0x20, mem_type = 0x20, mem_size = 0x15, uid_len = 0x10.
00087  *
00088  * UID holds optional Customized Factory Data (CFD) content. The CFD bytes are
00089  * read-only and can be programmed with customers data upon their request.
00090  * If the customers do not make requests, the devices are shipped with all the
00091  * CFD bytes programmed to 0x00.
00092  */
00093 struct m25p16_rdid {
00094   uint8_t  man_id;   /** Manufacturer ID */
00095   uint8_t  mem_type; /** Memory Type */
00096   uint8_t  mem_size; /** Memory Size */
00097   uint8_t  uid_len;  /** Unique ID length */
00098   uint8_t  uid[16];  /** Unique ID */
00099 };
00100 /*---------------------------------------------------------------------------*/
00101 /**
00102  * \brief Retrieve Block Protect Bits from the status register
00103  *
00104  * This macro returns the software block protect status on the device
00105  * by reading the value of the BP bits ([5:3]) in the Status Register
00106  */
00107 #define M25P16_BP() (m25p16_rdsr() & M25P16_SR_BP)
00108 /**
00109  * \brief Check for Write in Progress
00110  * \retval 1 Write in progress
00111  * \retval 0 Write not in progress
00112  *
00113  * This macro checks if the device is currently in the middle of a write cycle
00114  * by reading the value of the WIP bit (bit 0) in the Status Register
00115  */
00116 #define M25P16_WIP() (m25p16_rdsr() & M25P16_SR_WIP)
00117 /**
00118  * \brief Check for Write-Enable
00119  * \retval 1 Write enabled
00120  * \retval 0 Write disabled
00121  *
00122  * This macro checks if the device is ready to accept a write instruction
00123  * by reading the value of the WEL bit (bit 1) in the Status Register
00124  */
00125 #define M25P16_WEL() (m25p16_rdsr() & M25P16_SR_WEL)
00126 /*---------------------------------------------------------------------------*/
00127 /**
00128  * \brief Write Enable (WREN) instruction.
00129  *
00130  * Completing a WRDI, PP, SE, BE and WRSR
00131  * resets the write enable latch bit, so this instruction should be used every
00132  * time before trying to write.
00133  */
00134 void m25p16_wren();
00135 
00136 /**
00137  * \brief Write Disable (WRDI) instruction
00138  */
00139 void m25p16_wrdi();
00140 
00141 /**
00142  * \brief Read Identifier (RDID)instruction
00143  *
00144  * \param rdid Pointer to a struct which will hold the information returned
00145  *             by the RDID instruction
00146  */
00147 void m25p16_rdid(struct m25p16_rdid * rdid);
00148 
00149 /**
00150  * \brief Read Status Register (RDSR) instruction
00151  *
00152  * \return Value of the status register
00153  *
00154  * Reads and returns the value of the status register on the Flash Chip
00155  */
00156 uint8_t m25p16_rdsr();
00157 
00158 /**
00159  * \brief Write Status Register (WRSR) instruction
00160  * \param val Value to be written to the status register
00161  *
00162  * This instruction does not afect bits 6, 5, 1 and 0 of the SR.
00163  */
00164 void m25p16_wrsr(uint8_t val);
00165 
00166 /**
00167  * \brief Read Data Bytes (READ) instruction
00168  * \param addr 3 byte array holding the read start address. MSB stored in
00169  *        addr[0] and LSB in addr[2]
00170  * \param buff Pointer to a buffer to hold the read bytes.
00171  * \param buff_len Number of bytes to read. buff must be long enough to hold
00172  *        buff_len bytes
00173  *
00174  * The bytes will be inverted after being read, so that a value of 0xFF (empty)
00175  * in the flash will read as 0x00
00176  */
00177 void m25p16_read(uint8_t * addr, uint8_t * buff, uint8_t buff_len);
00178 
00179 /**
00180  * \brief Program Page (PP) instruction
00181  * \param addr 3 byte array holding the write start address. MSB stored in
00182  *        addr[0] and LSB in addr[2]
00183  * \param buff Pointer to a buffer with the data to be written
00184  * \param buff_len Number of bytes to write, Maximum 256 bytes.
00185  *
00186  * Write BUFF_LEN bytes stored in BUFF to flash, starting from location
00187  * ADDR. BUFF_LEN may not exceed 256. ADDR should point to a 3 byte array,
00188  * with the address MSB stored in position 0 and LSB in position 2
00189  *
00190  * If the start address + buff_len exceed page boundaries, the write will
00191  * wrap to the start of the same page (the page at addr[2:1]).
00192  *
00193  * The bytes will be inverted before being written, so that a value of 0xFF
00194  * will be written as 0x00 (and subsequently correctly read as 0xFF by READ)
00195  *
00196  * This function will set the WEL bit on the SR before attempting to write,
00197  * so the calling function doesn't need to worry about this.
00198  *
00199  * This call is asynchronous. It will return before the write cycle has
00200  * completed. Thus, user software must check the WIP bit Write In Progress)
00201  * before sending further instructions. This can take up to 5 msecs (typical
00202  * duration for a 256 byte write is 640 usec)
00203  */
00204 void m25p16_pp(uint8_t * addr, uint8_t * buff, uint8_t buff_len);
00205 
00206 /**
00207  * \brief Sector Erase (SE) instruction
00208  * \param s The number of the sector to be erased
00209  *
00210  * Delete the entire sector number s, by setting it's contents to all 0xFF
00211  * (which will read as 0x00 by READ). The flash is broken down into 32 sectors,
00212  * 64 KBytes each.
00213  *
00214  * This function will set the WEL bit on the SR before attempting to write,
00215  * so the calling function doesn't need to worry about this.
00216  *
00217  * This call is asynchronous. It will return before the write cycle has
00218  * completed. Thus, user software must check the WIP bit Write In Progress)
00219  * before sending further instructions. This can take up to 3 secs (typical
00220  * duration 600 msec)
00221  */
00222 void m25p16_se(uint8_t s); /* Sector Erase */
00223 
00224 
00225 /**
00226  * \brief Bulk Erase (SE) instruction
00227  *
00228  * Delete the entire memory, by setting it's contents to all 0xFF
00229  * (which will read as 0x00 by READ).
00230  *
00231  * This function will set the WEL bit on the SR before attempting to write,
00232  * so the calling function doesn't need to worry about this.
00233  *
00234  * This call is asynchronous. It will return before the write cycle has
00235  * completed. Thus, user software must check the WIP bit Write In Progress)
00236  * before sending further instructions.
00237  *
00238  * This instructions takes a very long time to complete and must be used with
00239  * care. It can take up to 40 secs (yes, secs). A typical duration is 13 secs
00240  */
00241 void m25p16_be();
00242 
00243 /**
00244  * \brief Deep Power Down (DP) instruction
00245  *
00246  * Puts the device into its lowers power consumption mode (This is not the same
00247  * as the stand-by mode caused by de-selecting the device). While the device
00248  * is in DP, it will accept no instruction except a RES (Release from DP).
00249  *
00250  * This call is asynchronous and will return as soon as the instruction
00251  * sequence has been written but before the device has actually entered DP
00252  *
00253  * Dropping to DP takes 3usec and Resuming from DP takes at least 1.8usec, so
00254  * this sequence should not be used when the sleep interval is estimated to be
00255  * short (read as: don't DP then RES then DP repeatedly)
00256  */
00257 void m25p16_dp();          /* Deep Power down */
00258 
00259 /**
00260  * \brief Release from Deep Power Down (RES) instruction
00261  *
00262  * Take the device out of the Deep Power Down mode and bring it to standby.
00263  * Does not read the electronic signature.
00264  *
00265  * This call is synchronous. When it returns the device will be in standby
00266  * mode.
00267  *
00268  * Dropping to DP takes 3usec and Resuming from DP takes at least 1.8usec, so
00269  * this sequence should not be used when the sleep interval is estimated to be
00270  * short (read as: don't DP then RES then DP repeatedly)
00271  */
00272 void m25p16_res();
00273 
00274 /**
00275  * \brief Release from Deep Power Down (RES) and Read Electronic
00276  * Signature instruction
00277  *
00278  * \return The value of the electronic signature. This is provided for backward
00279  * compatibility and must always be 0x14
00280  *
00281  * Take the device out of the Deep Power Down mode and bring it to standby.
00282  * Does not read the electronic signature.
00283  *
00284  * This call is synchronous. When it returns the device will be in standby
00285  * mode.
00286  *
00287  * Dropping to DP takes 3usec and Resuming from DP takes at least 1.8usec, so
00288  * this sequence should not be used when the sleep interval is estimated to be
00289  * short (read as: don't DP then RES then DP repeatedly)
00290  */
00291 uint8_t m25p16_res_res();
00292 
00293 #endif /* M25P16_H_ */